| Loop Id: 3163 | Module: exec | Source: vector.c:486-486 | Coverage: 0.56% |
|---|
| Loop Id: 3163 | Module: exec | Source: vector.c:486-486 | Coverage: 0.56% |
|---|
0x5a89aa VMOVUPD (%R8,%RCX,1),%ZMM9 [2] |
0x5a89b1 VMOVUPD 0x40(%R8,%RCX,1),%ZMM10 [2] |
0x5a89b9 VMOVUPD 0x80(%R8,%RCX,1),%ZMM11 [2] |
0x5a89c1 VMOVUPD 0xc0(%R8,%RCX,1),%ZMM12 [2] |
0x5a89c9 VFMADD231PD (%R12,%RCX,1),%ZMM9,%ZMM8 [1] |
0x5a89d0 VMOVUPD 0x100(%R8,%RCX,1),%ZMM13 [2] |
0x5a89d8 VMOVUPD 0x140(%R8,%RCX,1),%ZMM14 [2] |
0x5a89e0 VMOVUPD 0x180(%R8,%RCX,1),%ZMM15 [2] |
0x5a89e8 VMOVUPD 0x1c0(%R8,%RCX,1),%ZMM0 [2] |
0x5a89f0 VFMADD231PD 0x40(%R12,%RCX,1),%ZMM10,%ZMM8 [1] |
0x5a89f8 VFMADD231PD 0x80(%R12,%RCX,1),%ZMM11,%ZMM8 [1] |
0x5a8a00 VFMADD231PD 0xc0(%R12,%RCX,1),%ZMM12,%ZMM8 [1] |
0x5a8a08 VFMADD231PD 0x100(%R12,%RCX,1),%ZMM13,%ZMM8 [1] |
0x5a8a10 VFMADD231PD 0x140(%R12,%RCX,1),%ZMM14,%ZMM8 [1] |
0x5a8a18 VFMADD231PD 0x180(%R12,%RCX,1),%ZMM15,%ZMM8 [1] |
0x5a8a20 VFMADD231PD 0x1c0(%R12,%RCX,1),%ZMM0,%ZMM8 [1] |
0x5a8a28 ADD $0x200,%RCX |
0x5a8a2f CMP %R11,%RCX |
0x5a8a32 JNE 5a89aa |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/seq_mv/vector.c: 486 - 486 |
-------------------------------------------------------------------------------- |
486: result += hypre_conj(y_data[i]) * x_data[i]; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ○100.00 | GOMP_parallel | libgomp.h:985 | libgomp.so.1.0.0 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 4.00 |
| Bottlenecks | |
| Function | hypre_SeqVectorInnerProd._omp_fn.0 |
| Source | vector.c:486-486 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 32.00 |
| CQA cycles if no scalar integer | 32.00 |
| CQA cycles if FP arith vectorized | 32.00 |
| CQA cycles if fully vectorized | 32.00 |
| Front-end cycles | 6.50 |
| DIV/SQRT cycles | 4.00 |
| P0 cycles | 4.00 |
| P1 cycles | 8.00 |
| P2 cycles | 8.00 |
| P3 cycles | 0.00 |
| P4 cycles | 4.00 |
| P5 cycles | 1.00 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 32 |
| FE+BE cycles (UFS) | 32.12 |
| Stall cycles (UFS) | 25.34 |
| Nb insns | 19.00 |
| Nb uops | 18.00 |
| Nb loads | 16.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 4.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 64.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 32.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1024.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 4.00 |
| Bottlenecks | |
| Function | hypre_SeqVectorInnerProd._omp_fn.0 |
| Source | vector.c:486-486 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 32.00 |
| CQA cycles if no scalar integer | 32.00 |
| CQA cycles if FP arith vectorized | 32.00 |
| CQA cycles if fully vectorized | 32.00 |
| Front-end cycles | 6.50 |
| DIV/SQRT cycles | 4.00 |
| P0 cycles | 4.00 |
| P1 cycles | 8.00 |
| P2 cycles | 8.00 |
| P3 cycles | 0.00 |
| P4 cycles | 4.00 |
| P5 cycles | 1.00 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 32 |
| FE+BE cycles (UFS) | 32.12 |
| Stall cycles (UFS) | 25.34 |
| Nb insns | 19.00 |
| Nb uops | 18.00 |
| Nb loads | 16.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 4.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 64.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 32.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 1024.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 100.00 |
| Vector-efficiency ratio load | 100.00 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 100.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | hypre_SeqVectorInnerProd._omp_fn.0 |
| Source file and lines | vector.c:486-486 |
| Module | exec |
| nb instructions | 19 |
| nb uops | 18 |
| loop length | 142 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 9 |
| nb stack references | 0 |
| micro-operation queue | 6.50 cycles |
| front end | 6.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 4.00 | 1.00 | 8.00 | 8.00 | 0.00 | 4.00 | 1.00 | 0.00 |
| cycles | 4.00 | 4.00 | 8.00 | 8.00 | 0.00 | 4.00 | 1.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 32.00 |
| FE+BE cycles | 32.12 |
| Stall cycles | 25.34 |
| LB full (events) | 28.80 |
| LM full (events) | 0.04 |
| Front-end | 6.50 |
| Dispatch | 8.00 |
| Data deps. | 32.00 |
| Overall L1 | 32.00 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R8,%RCX,1),%ZMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x40(%R8,%RCX,1),%ZMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x80(%R8,%RCX,1),%ZMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0xc0(%R8,%RCX,1),%ZMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VFMADD231PD (%R12,%RCX,1),%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VMOVUPD 0x100(%R8,%RCX,1),%ZMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x140(%R8,%RCX,1),%ZMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x180(%R8,%RCX,1),%ZMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x1c0(%R8,%RCX,1),%ZMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VFMADD231PD 0x40(%R12,%RCX,1),%ZMM10,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x80(%R12,%RCX,1),%ZMM11,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0xc0(%R12,%RCX,1),%ZMM12,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x100(%R12,%RCX,1),%ZMM13,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x140(%R12,%RCX,1),%ZMM14,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x180(%R12,%RCX,1),%ZMM15,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x1c0(%R12,%RCX,1),%ZMM0,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| ADD $0x200,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R11,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JNE 5a89aa | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| Function | hypre_SeqVectorInnerProd._omp_fn.0 |
| Source file and lines | vector.c:486-486 |
| Module | exec |
| nb instructions | 19 |
| nb uops | 18 |
| loop length | 142 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 9 |
| nb stack references | 0 |
| micro-operation queue | 6.50 cycles |
| front end | 6.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 4.00 | 1.00 | 8.00 | 8.00 | 0.00 | 4.00 | 1.00 | 0.00 |
| cycles | 4.00 | 4.00 | 8.00 | 8.00 | 0.00 | 4.00 | 1.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 32.00 |
| FE+BE cycles | 32.12 |
| Stall cycles | 25.34 |
| LB full (events) | 28.80 |
| LM full (events) | 0.04 |
| Front-end | 6.50 |
| Dispatch | 8.00 |
| Data deps. | 32.00 |
| Overall L1 | 32.00 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD (%R8,%RCX,1),%ZMM9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x40(%R8,%RCX,1),%ZMM10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x80(%R8,%RCX,1),%ZMM11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0xc0(%R8,%RCX,1),%ZMM12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VFMADD231PD (%R12,%RCX,1),%ZMM9,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VMOVUPD 0x100(%R8,%RCX,1),%ZMM13 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x140(%R8,%RCX,1),%ZMM14 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x180(%R8,%RCX,1),%ZMM15 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VMOVUPD 0x1c0(%R8,%RCX,1),%ZMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5-6 | 0.50 |
| VFMADD231PD 0x40(%R12,%RCX,1),%ZMM10,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x80(%R12,%RCX,1),%ZMM11,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0xc0(%R12,%RCX,1),%ZMM12,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x100(%R12,%RCX,1),%ZMM13,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x140(%R12,%RCX,1),%ZMM14,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x180(%R12,%RCX,1),%ZMM15,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD 0x1c0(%R12,%RCX,1),%ZMM0,%ZMM8 | 1 | 0.50 | 0 | 0.50 | 0.50 | 0 | 0.50 | 0 | 0 | 4 | 0.50 |
| ADD $0x200,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R11,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JNE 5a89aa | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
