| Loop Id: 858 | Module: exec | Source: par_multi_interp.c:1816-1822 | Coverage: 0.72% |
|---|
| Loop Id: 858 | Module: exec | Source: par_multi_interp.c:1816-1822 | Coverage: 0.72% |
|---|
0x4433c0 VMOVSD (%R14,%RDI,8),%XMM2 [1] |
0x4433c6 MOV (%RCX,%RDI,8),%RAX [5] |
0x4433ca VMULSD (%R13,%RDX,8),%XMM2,%XMM10 [4] |
0x4433d1 MOV (%RSI,%RAX,8),%RAX [3] |
0x4433d5 VADDSD (%R14,%RAX,8),%XMM10,%XMM2 [2] |
0x4433db VMOVSD %XMM2,(%R14,%RAX,8) [2] |
0x4433e1 VADDSD %XMM1,%XMM10,%XMM1 |
0x4433e5 VADDSD %XMM0,%XMM10,%XMM0 |
0x4433e9 INC %RDI |
0x4433ec CMP %RDI,%RBX |
0x4433ef JNE 4433c0 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1816 - 1822 |
-------------------------------------------------------------------------------- |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_fork_call | libiomp5.so | |
| ○ | __kmpc_fork_call | libiomp5.so | |
| ○ | hypre_BoomerAMGBuildMultipass | par_multi_interp.c:1737 | exec |
| ○ | hypre_BoomerAMGSetup | par_amg_setup.c:737 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| ○ | main | amg.c:398 | exec |
| ○ | __libc_init_first | libc.so.6 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 2.46 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.33 |
| Bottlenecks | |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source | par_multi_interp.c:1816-1822 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | peel/tail |
| Unroll factor | 1 |
| CQA cycles | 4.00 |
| CQA cycles if no scalar integer | 4.00 |
| CQA cycles if FP arith vectorized | 1.63 |
| CQA cycles if fully vectorized | 0.50 |
| Front-end cycles | 3.00 |
| DIV/SQRT cycles | 2.00 |
| P0 cycles | 2.00 |
| P1 cycles | 2.50 |
| P2 cycles | 2.50 |
| P3 cycles | 1.00 |
| P4 cycles | 1.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 4 |
| FE+BE cycles (UFS) | 4.16 |
| Stall cycles (UFS) | 0.73 |
| Nb insns | 11.00 |
| Nb uops | 10.00 |
| Nb loads | 5.00 |
| Nb stores | 1.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.00 |
| Nb FLOP add-sub | 3.00 |
| Nb FLOP mul | 1.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 40.00 |
| Bytes stored | 8.00 |
| Stride 0 | 1.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 12.50 |
| Vector-efficiency ratio mul | 12.50 |
| Vector-efficiency ratio add_sub | 12.50 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 2.46 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.33 |
| Bottlenecks | |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source | par_multi_interp.c:1816-1822 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | peel/tail |
| Unroll factor | 1 |
| CQA cycles | 4.00 |
| CQA cycles if no scalar integer | 4.00 |
| CQA cycles if FP arith vectorized | 1.63 |
| CQA cycles if fully vectorized | 0.50 |
| Front-end cycles | 3.00 |
| DIV/SQRT cycles | 2.00 |
| P0 cycles | 2.00 |
| P1 cycles | 2.50 |
| P2 cycles | 2.50 |
| P3 cycles | 1.00 |
| P4 cycles | 1.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 4 |
| FE+BE cycles (UFS) | 4.16 |
| Stall cycles (UFS) | 0.73 |
| Nb insns | 11.00 |
| Nb uops | 10.00 |
| Nb loads | 5.00 |
| Nb stores | 1.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.00 |
| Nb FLOP add-sub | 3.00 |
| Nb FLOP mul | 1.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 40.00 |
| Bytes stored | 8.00 |
| Stride 0 | 1.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | 0.00 |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 12.50 |
| Vector-efficiency ratio mul | 12.50 |
| Vector-efficiency ratio add_sub | 12.50 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source file and lines | par_multi_interp.c:1816-1822 |
| Module | exec |
| nb instructions | 11 |
| nb uops | 10 |
| loop length | 49 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 3.00 |
| micro-operation queue | 3.00 cycles |
| front end | 3.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 2.00 | 2.00 | 2.50 | 2.50 | 1.00 | 1.00 | 1.00 | 1.00 |
| cycles | 2.00 | 2.00 | 2.50 | 2.50 | 1.00 | 1.00 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 4.00 |
| FE+BE cycles | 4.16 |
| Stall cycles | 0.73 |
| LB full (events) | 1.47 |
| Front-end | 3.00 |
| Dispatch | 2.50 |
| Data deps. | 4.00 |
| Overall L1 | 4.00 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 12% |
| load | 12% |
| store | 12% |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVSD (%R14,%RDI,8),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| VMULSD (%R13,%RDX,8),%XMM2,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| MOV (%RSI,%RAX,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| VADDSD (%R14,%RAX,8),%XMM10,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVSD %XMM2,(%R14,%RAX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| VADDSD %XMM1,%XMM10,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VADDSD %XMM0,%XMM10,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| INC %RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %RDI,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JNE 4433c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source file and lines | par_multi_interp.c:1816-1822 |
| Module | exec |
| nb instructions | 11 |
| nb uops | 10 |
| loop length | 49 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| ADD-SUB / MUL ratio | 3.00 |
| micro-operation queue | 3.00 cycles |
| front end | 3.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 2.00 | 2.00 | 2.50 | 2.50 | 1.00 | 1.00 | 1.00 | 1.00 |
| cycles | 2.00 | 2.00 | 2.50 | 2.50 | 1.00 | 1.00 | 1.00 | 1.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 4.00 |
| FE+BE cycles | 4.16 |
| Stall cycles | 0.73 |
| LB full (events) | 1.47 |
| Front-end | 3.00 |
| Dispatch | 2.50 |
| Data deps. | 4.00 |
| Overall L1 | 4.00 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 12% |
| load | 12% |
| store | 12% |
| mul | 12% |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVSD (%R14,%RDI,8),%XMM2 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RCX,%RDI,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| VMULSD (%R13,%RDX,8),%XMM2,%XMM10 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| MOV (%RSI,%RAX,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| VADDSD (%R14,%RAX,8),%XMM10,%XMM2 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVSD %XMM2,(%R14,%RAX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| VADDSD %XMM1,%XMM10,%XMM1 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VADDSD %XMM0,%XMM10,%XMM0 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| INC %RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %RDI,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JNE 4433c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
