| Loop Id: 3737 | Module: exec | Source: IJMatrix_parcsr.c:2798-2812 | Coverage: 0.01% |
|---|
| Loop Id: 3737 | Module: exec | Source: IJMatrix_parcsr.c:2798-2812 | Coverage: 0.01% |
|---|
0x4de960 MOV %RDX,%RCX |
0x4de963 CMP %R8,%RAX |
0x4de966 MOV %RSI,%RAX |
0x4de969 JE 4de923 |
0x4de96b LEA 0x1(%RAX),%RSI |
0x4de96f MOV 0x8(%R13,%RAX,8),%RDX |
0x4de974 CMP %RDX,%RCX |
0x4de977 JGE 4de960 |
0x4de979 MOV %RCX,%RDI |
0x4de97c JMP 4de98d |
(3738) 0x4de980 INC %RDI |
(3738) 0x4de983 MOV (%R13,%RSI,8),%RDX |
(3738) 0x4de988 CMP %RDX,%RDI |
(3738) 0x4de98b JGE 4de960 |
(3738) 0x4de98d MOV (%RBX,%RDI,8),%RDX |
(3738) 0x4de991 SUB %R14,%RDX |
(3738) 0x4de994 MOV %RDX,(%RBX,%RDI,8) |
(3738) 0x4de998 CMP %RAX,%RDX |
(3738) 0x4de99b JNE 4de980 |
(3738) 0x4de99d VMOVSD (%R15,%RCX,8),%XMM0 |
(3738) 0x4de9a3 VMOVSD (%R15,%RDI,8),%XMM1 |
(3738) 0x4de9a9 VMOVSD %XMM1,(%R15,%RCX,8) |
(3738) 0x4de9af VMOVSD %XMM0,(%R15,%RDI,8) |
(3738) 0x4de9b5 MOV (%RBX,%RCX,8),%RDX |
(3738) 0x4de9b9 MOV %RDX,(%RBX,%RDI,8) |
(3738) 0x4de9bd MOV %RAX,(%RBX,%RCX,8) |
(3738) 0x4de9c1 JMP 4de980 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/IJ_mv/IJMatrix_parcsr.c: 2798 - 2812 |
-------------------------------------------------------------------------------- |
2798: #pragma omp parallel for private (i,j,j0,temp) |
2799: #endif |
2800: for (i=0; i < num_rows; i++) |
2801: { |
2802: j0 = diag_i[i]; |
2803: for (j=j0; j < diag_i[i+1]; j++) |
2804: { |
2805: diag_j[j] -= col_0; |
2806: if (diag_j[j] == i) |
2807: { |
2808: temp = diag_data[j0]; |
2809: diag_data[j0] = diag_data[j]; |
2810: diag_data[j] = temp; |
2811: diag_j[j] = diag_j[j0]; |
2812: diag_j[j0] = i; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_fork_call | libiomp5.so | |
| ○ | __kmpc_fork_call | libiomp5.so | |
| ○ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2798 | exec |
| ○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
| ○ | main | amg.c:274 | exec |
| ○ | __libc_init_first | libc.so.6 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.69 |
| Bottlenecks | |
| Function | hypre_IJMatrixAssembleParCSR.extracted.25 |
| Source | IJMatrix_parcsr.c:2798-2812 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.25 |
| CQA cycles if no scalar integer | 2.25 |
| CQA cycles if FP arith vectorized | 2.25 |
| CQA cycles if fully vectorized | 0.28 |
| Front-end cycles | 2.25 |
| DIV/SQRT cycles | 1.33 |
| P0 cycles | 1.33 |
| P1 cycles | 0.50 |
| P2 cycles | 0.50 |
| P3 cycles | 0.00 |
| P4 cycles | 1.33 |
| P5 cycles | 1.33 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.34 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 9.33 |
| Nb uops | 9.00 |
| Nb loads | 1.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 3.66 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 8.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.67 |
| Stride n | 0.00 |
| Stride unknown | 1.33 |
| Stride indirect | 2.33 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.75 |
| Bottlenecks | micro-operation queue, |
| Function | hypre_IJMatrixAssembleParCSR.extracted.25 |
| Source | IJMatrix_parcsr.c:2798-2812 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 1.75 |
| CQA cycles if no scalar integer | 1.75 |
| CQA cycles if FP arith vectorized | 1.75 |
| CQA cycles if fully vectorized | 0.22 |
| Front-end cycles | 1.75 |
| DIV/SQRT cycles | 1.00 |
| P0 cycles | 1.00 |
| P1 cycles | 0.50 |
| P2 cycles | 0.50 |
| P3 cycles | 0.00 |
| P4 cycles | 1.00 |
| P5 cycles | 1.00 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 1.83 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 8.00 |
| Nb uops | 7.00 |
| Nb loads | 1.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 4.57 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 8.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 0.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.67 |
| Bottlenecks | micro-operation queue, |
| Function | hypre_IJMatrixAssembleParCSR.extracted.25 |
| Source | IJMatrix_parcsr.c:2798-2812 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.50 |
| CQA cycles if no scalar integer | 2.50 |
| CQA cycles if FP arith vectorized | 2.50 |
| CQA cycles if fully vectorized | 0.31 |
| Front-end cycles | 2.50 |
| DIV/SQRT cycles | 1.50 |
| P0 cycles | 1.50 |
| P1 cycles | 0.50 |
| P2 cycles | 0.50 |
| P3 cycles | 0.00 |
| P4 cycles | 1.50 |
| P5 cycles | 1.50 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.59 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 10.00 |
| Nb uops | 10.00 |
| Nb loads | 1.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 3.20 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 8.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 2.00 |
| Stride indirect | 3.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Path / |
| Function | hypre_IJMatrixAssembleParCSR.extracted.25 |
| Source file and lines | IJMatrix_parcsr.c:2798-2812 |
| Module | exec |
| nb instructions | 9.33 |
| nb uops | 9 |
| loop length | 28.33 |
| used x86 registers | 6.67 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.33 | 1.33 | 0.50 | 0.50 | 0.00 | 1.33 | 1.33 | 0.00 |
| cycles | 1.33 | 1.33 | 0.50 | 0.50 | 0.00 | 1.33 | 1.33 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.34 |
| Stall cycles | 0.00 |
| Front-end | 2.25 |
| Dispatch | 1.33 |
| Data deps. | 1.00 |
| Overall L1 | 2.25 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Function | hypre_IJMatrixAssembleParCSR.extracted.25 |
| Source file and lines | IJMatrix_parcsr.c:2798-2812 |
| Module | exec |
| nb instructions | 8 |
| nb uops | 7 |
| loop length | 25 |
| used x86 registers | 6 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 1.75 cycles |
| front end | 1.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.00 | 1.00 | 0.50 | 0.50 | 0.00 | 1.00 | 1.00 | 0.00 |
| cycles | 1.00 | 1.00 | 0.50 | 0.50 | 0.00 | 1.00 | 1.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 1.83 |
| Stall cycles | 0.00 |
| Front-end | 1.75 |
| Dispatch | 1.00 |
| Data deps. | 1.00 |
| Overall L1 | 1.75 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| CMP %R8,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JE 4de923 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| LEA 0x1(%RAX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV 0x8(%R13,%RAX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 4de960 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| Function | hypre_IJMatrixAssembleParCSR.extracted.25 |
| Source file and lines | IJMatrix_parcsr.c:2798-2812 |
| Module | exec |
| nb instructions | 10 |
| nb uops | 10 |
| loop length | 30 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.50 cycles |
| front end | 2.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.50 | 1.50 | 0.50 | 0.50 | 0.00 | 1.50 | 1.50 | 0.00 |
| cycles | 1.50 | 1.50 | 0.50 | 0.50 | 0.00 | 1.50 | 1.50 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.59 |
| Stall cycles | 0.00 |
| Front-end | 2.50 |
| Dispatch | 1.50 |
| Data deps. | 1.00 |
| Overall L1 | 2.50 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV %RDX,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| CMP %R8,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV %RSI,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JE 4de923 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| LEA 0x1(%RAX),%RSI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV 0x8(%R13,%RAX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RDX,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 4de960 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV %RCX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 4de98d | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
