| Loop Id: 2385 | Module: exec | Source: par_strength.c:1756-1765 | Coverage: 0.01% |
|---|
| Loop Id: 2385 | Module: exec | Source: par_strength.c:1756-1765 | Coverage: 0.01% |
|---|
0x4980e0 INC %RAX |
0x4980e3 CMP %RBX,%RAX |
0x4980e6 JGE 498000 |
0x4980ec MOV 0x18(%RBP),%RCX [6] |
0x4980f0 MOV (%RCX,%RAX,8),%RCX [1] |
0x4980f4 MOV 0x70(%RBP),%RDX [6] |
0x4980f8 CMPQ $0,(%RDX,%RCX,8) [4] |
0x4980fd JLE 4980e0 |
0x4980ff MOV 0x80(%RBP),%RDX [6] |
0x498106 MOV (%RDX,%RCX,8),%RCX [2] |
0x49810a CMP %R15,(%R12,%RCX,8) [3] |
0x49810e JGE 4980e0 |
0x498110 MOV %RDI,(%R12,%RCX,8) [3] |
0x498114 INC %RDI |
0x498117 MOV %RDI,-0x38(%RBP) [6] |
0x49811b MOV 0x10(%RBP),%RCX [6] |
0x49811f MOV 0x8(%RCX,%RSI,8),%RBX [5] |
0x498124 JMP 4980e0 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_strength.c: 1756 - 1765 |
-------------------------------------------------------------------------------- |
1756: for (jj2 = S_offd_i[i2]; jj2 < S_offd_i[i2+1]; jj2++) |
1757: { |
1758: i3 = S_offd_j[jj2]; |
1759: if (CF_marker_offd[i3] > 0) |
1760: { |
1761: index = map_S_to_C[i3]; |
1762: if (S_marker_offd[index] < jj_row_begin_offd) |
1763: { |
1764: S_marker_offd[index] = num_nonzeros_offd; |
1765: num_nonzeros_offd++; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_fork_call | libiomp5.so | |
| ○ | __kmpc_fork_call | libiomp5.so | |
| ○ | hypre_BoomerAMGCreate2ndS | par_strength.c:1668 | exec |
| ○ | hypre_BoomerAMGSetup | par_amg_setup.c:617 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| ○ | main | amg.c:398 | exec |
| ○ | __libc_init_first | libc.so.6 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.17 |
| Bottlenecks | |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source | par_strength.c:1756-1765 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.42 |
| CQA cycles if no scalar integer | 3.42 |
| CQA cycles if FP arith vectorized | 3.42 |
| CQA cycles if fully vectorized | 0.43 |
| Front-end cycles | 3.25 |
| DIV/SQRT cycles | 1.67 |
| P0 cycles | 1.67 |
| P1 cycles | 3.33 |
| P2 cycles | 3.33 |
| P3 cycles | 0.67 |
| P4 cycles | 1.67 |
| P5 cycles | 1.67 |
| P6 cycles | 0.67 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 3.70 |
| Stall cycles (UFS) | 0.21 |
| Nb insns | 12.67 |
| Nb uops | 12.33 |
| Nb loads | 6.67 |
| Nb stores | 0.67 |
| Nb stack references | 3.33 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 16.84 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 53.33 |
| Bytes stored | 5.33 |
| Stride 0 | 1.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 12.50 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.60 |
| Bottlenecks | micro-operation queue, P2, P3, |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source | par_strength.c:1756-1765 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.00 |
| CQA cycles if no scalar integer | 2.00 |
| CQA cycles if FP arith vectorized | 2.00 |
| CQA cycles if fully vectorized | 0.25 |
| Front-end cycles | 2.00 |
| DIV/SQRT cycles | 1.25 |
| P0 cycles | 1.25 |
| P1 cycles | 2.00 |
| P2 cycles | 2.00 |
| P3 cycles | 0.00 |
| P4 cycles | 1.25 |
| P5 cycles | 1.25 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.38 |
| Stall cycles (UFS) | 0.14 |
| Nb insns | 8.00 |
| Nb uops | 8.00 |
| Nb loads | 4.00 |
| Nb stores | 0.00 |
| Nb stack references | 2.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 16.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 32.00 |
| Bytes stored | 0.00 |
| Stride 0 | 1.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.06 |
| Bottlenecks | micro-operation queue, |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source | par_strength.c:1756-1765 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.75 |
| CQA cycles if no scalar integer | 4.75 |
| CQA cycles if FP arith vectorized | 4.75 |
| CQA cycles if fully vectorized | 0.59 |
| Front-end cycles | 4.75 |
| DIV/SQRT cycles | 2.25 |
| P0 cycles | 2.25 |
| P1 cycles | 4.50 |
| P2 cycles | 4.50 |
| P3 cycles | 2.00 |
| P4 cycles | 2.25 |
| P5 cycles | 2.25 |
| P6 cycles | 2.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 5.03 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 18.00 |
| Nb uops | 18.00 |
| Nb loads | 9.00 |
| Nb stores | 2.00 |
| Nb stack references | 5.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 18.53 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 72.00 |
| Bytes stored | 16.00 |
| Stride 0 | 1.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 3.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 12.50 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.17 |
| Bottlenecks | P2, P3, |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source | par_strength.c:1756-1765 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 3.50 |
| CQA cycles if no scalar integer | 3.50 |
| CQA cycles if FP arith vectorized | 3.50 |
| CQA cycles if fully vectorized | 0.44 |
| Front-end cycles | 3.00 |
| DIV/SQRT cycles | 1.50 |
| P0 cycles | 1.50 |
| P1 cycles | 3.50 |
| P2 cycles | 3.50 |
| P3 cycles | 0.00 |
| P4 cycles | 1.50 |
| P5 cycles | 1.50 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 3.68 |
| Stall cycles (UFS) | 0.47 |
| Nb insns | 12.00 |
| Nb uops | 11.00 |
| Nb loads | 7.00 |
| Nb stores | 0.00 |
| Nb stack references | 3.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 16.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 56.00 |
| Bytes stored | 0.00 |
| Stride 0 | 1.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Path / |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source file and lines | par_strength.c:1756-1765 |
| Module | exec |
| nb instructions | 12.67 |
| nb uops | 12.33 |
| loop length | 49.67 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 3.33 |
| micro-operation queue | 3.25 cycles |
| front end | 3.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.67 | 1.67 | 3.33 | 3.33 | 0.67 | 1.67 | 1.67 | 0.67 |
| cycles | 1.67 | 1.67 | 3.33 | 3.33 | 0.67 | 1.67 | 1.67 | 0.67 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 3.70 |
| Stall cycles | 0.21 |
| LM full (events) | 0.59 |
| Front-end | 3.25 |
| Dispatch | 3.33 |
| Data deps. | 1.00 |
| Overall L1 | 3.42 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source file and lines | par_strength.c:1756-1765 |
| Module | exec |
| nb instructions | 8 |
| nb uops | 8 |
| loop length | 31 |
| used x86 registers | 5 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 2 |
| micro-operation queue | 2.00 cycles |
| front end | 2.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.25 | 1.25 | 2.00 | 2.00 | 0.00 | 1.25 | 1.25 | 0.00 |
| cycles | 1.25 | 1.25 | 2.00 | 2.00 | 0.00 | 1.25 | 1.25 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.38 |
| Stall cycles | 0.14 |
| LM full (events) | 0.35 |
| Front-end | 2.00 |
| Dispatch | 2.00 |
| Data deps. | 1.00 |
| Overall L1 | 2.00 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %RBX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 498000 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RCX,%RAX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMPQ $0,(%RDX,%RCX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JLE 4980e0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source file and lines | par_strength.c:1756-1765 |
| Module | exec |
| nb instructions | 18 |
| nb uops | 18 |
| loop length | 70 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 5 |
| micro-operation queue | 4.75 cycles |
| front end | 4.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 2.25 | 2.25 | 4.50 | 4.50 | 2.00 | 2.25 | 2.25 | 2.00 |
| cycles | 2.25 | 2.25 | 4.50 | 4.50 | 2.00 | 2.25 | 2.25 | 2.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 5.03 |
| Stall cycles | 0.00 |
| Front-end | 4.75 |
| Dispatch | 4.50 |
| Data deps. | 1.00 |
| Overall L1 | 4.75 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %RBX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 498000 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RCX,%RAX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMPQ $0,(%RDX,%RCX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JLE 4980e0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV 0x80(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RDX,%RCX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %R15,(%R12,%RCX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JGE 4980e0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV %RDI,(%R12,%RCX,8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| INC %RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV %RDI,-0x38(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV 0x10(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%RCX,%RSI,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| JMP 4980e0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| Function | hypre_BoomerAMGCreate2ndS.extracted.17 |
| Source file and lines | par_strength.c:1756-1765 |
| Module | exec |
| nb instructions | 12 |
| nb uops | 11 |
| loop length | 48 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 3 |
| micro-operation queue | 3.00 cycles |
| front end | 3.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.50 | 1.50 | 3.50 | 3.50 | 0.00 | 1.50 | 1.50 | 0.00 |
| cycles | 1.50 | 1.50 | 3.50 | 3.50 | 0.00 | 1.50 | 1.50 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 3.68 |
| Stall cycles | 0.47 |
| LM full (events) | 1.42 |
| Front-end | 3.00 |
| Dispatch | 3.50 |
| Data deps. | 1.00 |
| Overall L1 | 3.50 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| INC %RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %RBX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 498000 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV 0x18(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RCX,%RAX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x70(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMPQ $0,(%RDX,%RCX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JLE 4980e0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV 0x80(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RDX,%RCX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %R15,(%R12,%RCX,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JGE 4980e0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
