| Loop Id: 3839 | Module: exec | Source: csr_matop.c:222-231 | Coverage: 0.12% |
|---|
| Loop Id: 3839 | Module: exec | Source: csr_matop.c:222-231 | Coverage: 0.12% |
|---|
0x4d0460 MOV -0x48(%RBP),%RDX |
0x4d0464 MOV (%RDX,%R8,8),%R9 |
0x4d0468 INC %R10 |
0x4d046b CMP %R9,%R10 |
0x4d046e JGE 4d0420 |
0x4d0470 MOV (%R11,%R10,8),%RDI |
0x4d0474 MOV (%R14,%RDI,8),%RBX |
0x4d0478 MOV 0x8(%R14,%RDI,8),%RDX |
0x4d047d CMP %RDX,%RBX |
0x4d0480 JL 4d0498 |
0x4d0482 JMP 4d0468 |
(3840) 0x4d0490 INC %RBX |
(3840) 0x4d0493 CMP %RDX,%RBX |
(3840) 0x4d0496 JGE 4d0460 |
(3840) 0x4d0498 MOV (%R15,%RBX,8),%RSI |
(3840) 0x4d049c CMP %RCX,(%R13,%RSI,8) |
(3840) 0x4d04a1 JE 4d0490 |
(3840) 0x4d04a3 MOV %RCX,(%R13,%RSI,8) |
(3840) 0x4d04a8 INC %RAX |
(3840) 0x4d04ab MOV 0x8(%R14,%RDI,8),%RDX |
(3840) 0x4d04b0 JMP 4d0490 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/seq_mv/csr_matop.c: 222 - 231 |
-------------------------------------------------------------------------------- |
222: for (ia = A_i[ic]; ia < A_i[ic+1]; ia++) |
223: { |
224: ja = A_j[ia]; |
225: for (ib = B_i[ja]; ib < B_i[ja+1]; ib++) |
226: { |
227: jb = B_j[ib]; |
228: if (B_marker[jb] != ic) |
229: { |
230: B_marker[jb] = ic; |
231: num_nonzeros++; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_fork_call | libiomp5.so | |
| ○ | __kmpc_fork_call | libiomp5.so | |
| ○ | hypre_CSRMatrixMultiply | csr_matop.c:185 | exec |
| ○ | hypre_ParTMatmul | par_csr_matop.c:3285 | exec |
| ○ | hypre_BoomerAMGSetup | par_amg_setup.c:1227 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| ○ | main | amg.c:398 | exec |
| ○ | __libc_init_first | libc.so.6 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.21 |
| Bottlenecks | |
| Function | hypre_CSRMatrixMultiply.extracted |
| Source | csr_matop.c:222-231 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.42 |
| CQA cycles if no scalar integer | 2.42 |
| CQA cycles if FP arith vectorized | 2.42 |
| CQA cycles if fully vectorized | 0.30 |
| Front-end cycles | 2.25 |
| DIV/SQRT cycles | 1.17 |
| P0 cycles | 1.17 |
| P1 cycles | 2.17 |
| P2 cycles | 2.17 |
| P3 cycles | 0.00 |
| P4 cycles | 1.17 |
| P5 cycles | 1.17 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.56 |
| Stall cycles (UFS) | 0.14 |
| Nb insns | 9.67 |
| Nb uops | 9.00 |
| Nb loads | 4.33 |
| Nb stores | 0.00 |
| Nb stack references | 0.67 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 14.22 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 34.67 |
| Bytes stored | 0.00 |
| Stride 0 | 1.33 |
| Stride 1 | 1.67 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 1.67 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.50 |
| Bottlenecks | micro-operation queue, |
| Function | hypre_CSRMatrixMultiply.extracted |
| Source | csr_matop.c:222-231 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.25 |
| CQA cycles if no scalar integer | 2.25 |
| CQA cycles if FP arith vectorized | 2.25 |
| CQA cycles if fully vectorized | 0.28 |
| Front-end cycles | 2.25 |
| DIV/SQRT cycles | 1.50 |
| P0 cycles | 1.50 |
| P1 cycles | 1.50 |
| P2 cycles | 1.50 |
| P3 cycles | 0.00 |
| P4 cycles | 1.50 |
| P5 cycles | 1.50 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.40 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 9.00 |
| Nb uops | 9.00 |
| Nb loads | 3.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 10.67 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 24.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | NA |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | NA |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.11 |
| Bottlenecks | P2, P3, |
| Function | hypre_CSRMatrixMultiply.extracted |
| Source | csr_matop.c:222-231 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.50 |
| CQA cycles if no scalar integer | 2.50 |
| CQA cycles if FP arith vectorized | 2.50 |
| CQA cycles if fully vectorized | 0.31 |
| Front-end cycles | 2.25 |
| DIV/SQRT cycles | 1.00 |
| P0 cycles | 1.00 |
| P1 cycles | 2.50 |
| P2 cycles | 2.50 |
| P3 cycles | 0.00 |
| P4 cycles | 1.00 |
| P5 cycles | 1.00 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.64 |
| Stall cycles (UFS) | 0.21 |
| Nb insns | 10.00 |
| Nb uops | 9.00 |
| Nb loads | 5.00 |
| Nb stores | 0.00 |
| Nb stack references | 1.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 16.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 40.00 |
| Bytes stored | 0.00 |
| Stride 0 | 2.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Path / |
| Function | hypre_CSRMatrixMultiply.extracted |
| Source file and lines | csr_matop.c:222-231 |
| Module | exec |
| nb instructions | 9.67 |
| nb uops | 9 |
| loop length | 32 |
| used x86 registers | 8.33 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0.67 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.17 | 1.17 | 2.17 | 2.17 | 0.00 | 1.17 | 1.17 | 0.00 |
| cycles | 1.17 | 1.17 | 2.17 | 2.17 | 0.00 | 1.17 | 1.17 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.56 |
| Stall cycles | 0.14 |
| LM full (events) | 0.56 |
| Front-end | 2.25 |
| Dispatch | 2.17 |
| Data deps. | 1.00 |
| Overall L1 | 2.42 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Function | hypre_CSRMatrixMultiply.extracted |
| Source file and lines | csr_matop.c:222-231 |
| Module | exec |
| nb instructions | 9 |
| nb uops | 9 |
| loop length | 28 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.50 | 1.50 | 1.50 | 1.50 | 0.00 | 1.50 | 1.50 | 0.00 |
| cycles | 1.50 | 1.50 | 1.50 | 1.50 | 0.00 | 1.50 | 1.50 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.40 |
| Stall cycles | 0.00 |
| Front-end | 2.25 |
| Dispatch | 1.50 |
| Data deps. | 1.00 |
| Overall L1 | 2.25 |
| all | 0% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | NA (no load vectorizable/vectorized instructions) |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| INC %R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 4d0420 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV (%R11,%R10,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%R14,%RDI,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%R14,%RDI,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RDX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JL 4d0498 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| JMP 4d0468 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| Function | hypre_CSRMatrixMultiply.extracted |
| Source file and lines | csr_matop.c:222-231 |
| Module | exec |
| nb instructions | 10 |
| nb uops | 9 |
| loop length | 34 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 1 |
| micro-operation queue | 2.25 cycles |
| front end | 2.25 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 1.00 | 1.00 | 2.50 | 2.50 | 0.00 | 1.00 | 1.00 | 0.00 |
| cycles | 1.00 | 1.00 | 2.50 | 2.50 | 0.00 | 1.00 | 1.00 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.64 |
| Stall cycles | 0.21 |
| LM full (events) | 0.84 |
| Front-end | 2.25 |
| Dispatch | 2.50 |
| Data deps. | 1.00 |
| Overall L1 | 2.50 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV -0x48(%RBP),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RDX,%R8,8),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| INC %R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 4d0420 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV (%R11,%R10,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%R14,%RDI,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%R14,%RDI,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RDX,%RBX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JL 4d0498 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
