| Loop Id: 870 | Module: exec | Source: par_multi_interp.c:1747-1837 [...] | Coverage: 1.36% |
|---|
| Loop Id: 870 | Module: exec | Source: par_multi_interp.c:1747-1837 [...] | Coverage: 1.36% |
|---|
0x448c60 MOV -0x50(%RBP),%R10 |
0x448c64 MOV -0x30(%RBP),%RBX |
0x448c68 INC %RDX |
0x448c6b CMP %R9,%RDX |
0x448c6e JE 448fc0 |
0x448c74 MOV -0x170(%RBP),%RAX |
0x448c7b MOV (%RAX,%RDX,8),%R11 |
0x448c7f MOV -0x90(%RBP),%RAX |
0x448c86 CMP %RBX,(%RAX,%R11,8) |
0x448c8a JNE 448cc0 |
0x448c8c MOV -0xb8(%RBP),%RAX |
0x448c93 MOV (%RAX,%R11,8),%RDI |
0x448c97 MOV 0x8(%RAX,%R11,8),%RBX |
0x448c9c MOV %RBX,%R10 |
0x448c9f SUB %RDI,%R10 |
0x448ca2 JLE 448e44 |
0x448ca8 CMP $0x4,%R10 |
0x448cac JAE 448d00 |
0x448cae JMP 448de0 |
0x448cc0 MOV -0x158(%RBP),%RAX |
0x448cc7 CMPQ $-0x3,(%RAX,%R11,8) |
0x448ccc JE 448c68 |
0x448cce CMPQ $0x1,-0xe8(%RBP) |
0x448cd6 JE 448ced |
0x448cd8 MOV -0xc8(%RBP),%RCX |
0x448cdf MOV (%RCX,%RBX,8),%RAX |
0x448ce3 CMP (%RCX,%R11,8),%RAX |
0x448ce7 JNE 448c68 |
0x448ced VADDSD (%R13,%RDX,8),%XMM0,%XMM0 |
0x448cf4 JMP 448c68 |
0x448d00 MOV %R10,%RAX |
0x448d03 SHR $0x2,%RAX |
0x448d07 LEA 0x18(,%RDI,8),%RCX |
0x448d0f MOV -0x48(%RBP),%R12 |
0x448d13 NOPW %CS:(%RAX,%RAX,1) |
(873) 0x448d20 MOV -0x18(%R8,%RCX,1),%RSI |
(873) 0x448d25 VMOVSD -0x18(%R14,%RCX,1),%XMM8 |
(873) 0x448d2c VMOVSD (%R13,%RDX,8),%XMM3 |
(873) 0x448d33 MOV (%R12,%RSI,8),%RSI |
(873) 0x448d37 VMOVSD (%R14,%RSI,8),%XMM4 |
(873) 0x448d3d VFMADD231SD %XMM8,%XMM3,%XMM4 |
(873) 0x448d42 VMOVSD %XMM4,(%R14,%RSI,8) |
(873) 0x448d48 MOV -0x10(%R8,%RCX,1),%RSI |
(873) 0x448d4d VMOVSD -0x10(%R14,%RCX,1),%XMM4 |
(873) 0x448d54 VMOVSD (%R13,%RDX,8),%XMM5 |
(873) 0x448d5b MOV (%R12,%RSI,8),%RSI |
(873) 0x448d5f VMOVSD (%R14,%RSI,8),%XMM6 |
(873) 0x448d65 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(873) 0x448d6a VMOVSD %XMM6,(%R14,%RSI,8) |
(873) 0x448d70 MOV -0x8(%R8,%RCX,1),%RSI |
(873) 0x448d75 VMOVSD -0x8(%R14,%RCX,1),%XMM6 |
(873) 0x448d7c VMOVSD (%R13,%RDX,8),%XMM7 |
(873) 0x448d83 MOV (%R12,%RSI,8),%RSI |
(873) 0x448d87 VMOVSD (%R14,%RSI,8),%XMM2 |
(873) 0x448d8d VFMADD231SD %XMM6,%XMM7,%XMM2 |
(873) 0x448d92 VMOVSD %XMM2,(%R14,%RSI,8) |
(873) 0x448d98 MOV (%R8,%RCX,1),%RSI |
(873) 0x448d9c VMOVSD (%R14,%RCX,1),%XMM2 |
(873) 0x448da2 VMULSD (%R13,%RDX,8),%XMM2,%XMM18 |
(873) 0x448daa MOV (%R12,%RSI,8),%RSI |
(873) 0x448dae VADDSD (%R14,%RSI,8),%XMM18,%XMM2 |
(873) 0x448db5 VMOVSD %XMM2,(%R14,%RSI,8) |
(873) 0x448dbb VFMADD213SD %XMM18,%XMM5,%XMM4 |
(873) 0x448dc1 VFMADD231SD %XMM8,%XMM3,%XMM4 |
(873) 0x448dc6 VFMADD231SD %XMM6,%XMM7,%XMM4 |
(873) 0x448dcb VADDSD %XMM1,%XMM4,%XMM1 |
(873) 0x448dcf VADDSD %XMM0,%XMM4,%XMM0 |
(873) 0x448dd3 ADD $0x20,%RCX |
(873) 0x448dd7 DEC %RAX |
(873) 0x448dda JNE 448d20 |
0x448de0 MOV %R10,%RAX |
0x448de3 AND $-0x4,%RAX |
0x448de7 CMP %R10,%RAX |
0x448dea JAE 448e40 |
0x448dec ADD %RAX,%RDI |
0x448def MOV -0x80(%RBP),%RCX |
0x448df3 MOV -0x48(%RBP),%RSI |
0x448df7 MOV -0x40(%RBP),%R12 |
0x448dfb NOPL (%RAX,%RAX,1) |
(874) 0x448e00 VMOVSD (%R14,%RDI,8),%XMM2 |
(874) 0x448e06 MOV (%RCX,%RDI,8),%RAX |
(874) 0x448e0a VMULSD (%R13,%RDX,8),%XMM2,%XMM18 |
(874) 0x448e12 MOV (%RSI,%RAX,8),%RAX |
(874) 0x448e16 VADDSD (%R14,%RAX,8),%XMM18,%XMM2 |
(874) 0x448e1d VMOVSD %XMM2,(%R14,%RAX,8) |
(874) 0x448e23 VADDSD %XMM1,%XMM18,%XMM1 |
(874) 0x448e29 VADDSD %XMM0,%XMM18,%XMM0 |
(874) 0x448e2f INC %RDI |
(874) 0x448e32 CMP %RDI,%RBX |
(874) 0x448e35 JNE 448e00 |
0x448e37 JMP 448e44 |
0x448e40 MOV -0x40(%RBP),%R12 |
0x448e44 MOV -0xc0(%RBP),%RAX |
0x448e4b MOV (%RAX,%R11,8),%RDI |
0x448e4f MOV 0x8(%RAX,%R11,8),%R11 |
0x448e54 MOV %R11,%R10 |
0x448e57 SUB %RDI,%R10 |
0x448e5a JLE 448c60 |
0x448e60 CMP $0x4,%R10 |
0x448e64 MOV -0xa0(%RBP),%RSI |
0x448e6b JAE 448e80 |
0x448e6d JMP 448f50 |
0x448e80 MOV %R10,%RCX |
0x448e83 SHR $0x2,%RCX |
0x448e87 LEA 0x18(,%RDI,8),%RBX |
0x448e8f NOP |
(871) 0x448e90 MOV -0x18(%RSI,%RBX,1),%RAX |
(871) 0x448e95 VMOVSD -0x18(%R15,%RBX,1),%XMM8 |
(871) 0x448e9c VMOVSD (%R13,%RDX,8),%XMM3 |
(871) 0x448ea3 MOV (%R12,%RAX,8),%RAX |
(871) 0x448ea7 VMOVSD (%R15,%RAX,8),%XMM4 |
(871) 0x448ead VFMADD231SD %XMM8,%XMM3,%XMM4 |
(871) 0x448eb2 VMOVSD %XMM4,(%R15,%RAX,8) |
(871) 0x448eb8 MOV -0x10(%RSI,%RBX,1),%RAX |
(871) 0x448ebd VMOVSD -0x10(%R15,%RBX,1),%XMM4 |
(871) 0x448ec4 VMOVSD (%R13,%RDX,8),%XMM5 |
(871) 0x448ecb MOV (%R12,%RAX,8),%RAX |
(871) 0x448ecf VMOVSD (%R15,%RAX,8),%XMM6 |
(871) 0x448ed5 VFMADD231SD %XMM4,%XMM5,%XMM6 |
(871) 0x448eda VMOVSD %XMM6,(%R15,%RAX,8) |
(871) 0x448ee0 MOV -0x8(%RSI,%RBX,1),%RAX |
(871) 0x448ee5 VMOVSD -0x8(%R15,%RBX,1),%XMM6 |
(871) 0x448eec VMOVSD (%R13,%RDX,8),%XMM7 |
(871) 0x448ef3 MOV (%R12,%RAX,8),%RAX |
(871) 0x448ef7 VMOVSD (%R15,%RAX,8),%XMM2 |
(871) 0x448efd VFMADD231SD %XMM6,%XMM7,%XMM2 |
(871) 0x448f02 VMOVSD %XMM2,(%R15,%RAX,8) |
(871) 0x448f08 MOV (%RSI,%RBX,1),%RAX |
(871) 0x448f0c VMOVSD (%R15,%RBX,1),%XMM2 |
(871) 0x448f12 VMULSD (%R13,%RDX,8),%XMM2,%XMM18 |
(871) 0x448f1a MOV (%R12,%RAX,8),%RAX |
(871) 0x448f1e VADDSD (%R15,%RAX,8),%XMM18,%XMM2 |
(871) 0x448f25 VMOVSD %XMM2,(%R15,%RAX,8) |
(871) 0x448f2b VFMADD213SD %XMM18,%XMM5,%XMM4 |
(871) 0x448f31 VFMADD231SD %XMM8,%XMM3,%XMM4 |
(871) 0x448f36 VFMADD231SD %XMM6,%XMM7,%XMM4 |
(871) 0x448f3b VADDSD %XMM1,%XMM4,%XMM1 |
(871) 0x448f3f VADDSD %XMM0,%XMM4,%XMM0 |
(871) 0x448f43 ADD $0x20,%RBX |
(871) 0x448f47 DEC %RCX |
(871) 0x448f4a JNE 448e90 |
0x448f50 MOV %R10,%RCX |
0x448f53 AND $-0x4,%RCX |
0x448f57 CMP %R10,%RCX |
0x448f5a JAE 448c60 |
0x448f60 ADD %RCX,%RDI |
0x448f63 MOV -0x50(%RBP),%R10 |
0x448f67 MOV -0x30(%RBP),%RBX |
0x448f6b NOPL (%RAX,%RAX,1) |
(872) 0x448f70 VMOVSD (%R15,%RDI,8),%XMM2 |
(872) 0x448f76 MOV (%RSI,%RDI,8),%RAX |
(872) 0x448f7a VMULSD (%R13,%RDX,8),%XMM2,%XMM18 |
(872) 0x448f82 MOV (%R12,%RAX,8),%RAX |
(872) 0x448f86 VADDSD (%R15,%RAX,8),%XMM18,%XMM2 |
(872) 0x448f8d VMOVSD %XMM2,(%R15,%RAX,8) |
(872) 0x448f93 VADDSD %XMM1,%XMM18,%XMM1 |
(872) 0x448f99 VADDSD %XMM0,%XMM18,%XMM0 |
(872) 0x448f9f INC %RDI |
(872) 0x448fa2 CMP %RDI,%R11 |
(872) 0x448fa5 JNE 448f70 |
0x448fa7 JMP 448c68 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 1747 - 1837 |
-------------------------------------------------------------------------------- |
1747: if (n_fine) |
[...] |
1811: for (j=A_diag_i[i1]+1; j < A_diag_i[i1+1]; j++) |
1812: { |
1813: j1 = A_diag_j[j]; |
1814: if (tmp_marker[j1] == i1) |
1815: { |
1816: for (k=P_diag_i[j1]; k < P_diag_i[j1+1]; k++) |
1817: { |
1818: k1 = P_diag_j[k]; |
1819: alfa = A_diag_data[j]*P_diag_data[k]; |
1820: P_diag_data[tmp_array[k1]] += alfa; |
1821: sum_C += alfa; |
1822: sum_N += alfa; |
1823: } |
1824: for (k=P_offd_i[j1]; k < P_offd_i[j1+1]; k++) |
1825: { |
1826: k1 = P_offd_j[k]; |
1827: alfa = A_diag_data[j]*P_offd_data[k]; |
1828: P_offd_data[tmp_array_offd[k1]] += alfa; |
1829: sum_C += alfa; |
1830: sum_N += alfa; |
1831: } |
1832: } |
1833: else |
1834: { |
1835: if (CF_marker[j1] != -3 && |
1836: (num_functions == 1 || dof_func[i1] == dof_func[j1])) |
1837: sum_N += A_diag_data[j]; |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_fork_call | libiomp5.so | |
| ○ | __kmpc_fork_call | libiomp5.so | |
| ○ | hypre_BoomerAMGBuildMultipass | par_multi_interp.c:1737 | exec |
| ○ | hypre_BoomerAMGSetup | par_amg_setup.c:737 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| ○ | main | amg.c:398 | exec |
| ○ | __libc_init_first | libc.so.6 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 3.00 |
| CQA speedup if FP arith vectorized | 2.59 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.33 |
| Bottlenecks | micro-operation queue, |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source | par_multi_interp.c:1747-1837 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 18.00 |
| CQA cycles if no scalar integer | 6.00 |
| CQA cycles if FP arith vectorized | 6.94 |
| CQA cycles if fully vectorized | 2.25 |
| Front-end cycles | 18.00 |
| DIV/SQRT cycles | 9.25 |
| P0 cycles | 9.25 |
| P1 cycles | 13.50 |
| P2 cycles | 13.50 |
| P3 cycles | 0.00 |
| P4 cycles | 9.25 |
| P5 cycles | 9.25 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | 18.18 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 69.00 |
| Nb uops | 69.00 |
| Nb loads | 27.00 |
| Nb stores | 0.00 |
| Nb stack references | 13.00 |
| FLOP/cycle | 0.06 |
| Nb FLOP add-sub | 1.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 216.00 |
| Bytes stored | 0.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 12.50 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 3.00 |
| CQA speedup if FP arith vectorized | 2.59 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.33 |
| Bottlenecks | micro-operation queue, |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source | par_multi_interp.c:1747-1837 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 18.00 |
| CQA cycles if no scalar integer | 6.00 |
| CQA cycles if FP arith vectorized | 6.94 |
| CQA cycles if fully vectorized | 2.25 |
| Front-end cycles | 18.00 |
| DIV/SQRT cycles | 9.25 |
| P0 cycles | 9.25 |
| P1 cycles | 13.50 |
| P2 cycles | 13.50 |
| P3 cycles | 0.00 |
| P4 cycles | 9.25 |
| P5 cycles | 9.25 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | 18.18 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 69.00 |
| Nb uops | 69.00 |
| Nb loads | 27.00 |
| Nb stores | 0.00 |
| Nb stack references | 13.00 |
| FLOP/cycle | 0.06 |
| Nb FLOP add-sub | 1.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 216.00 |
| Bytes stored | 0.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 0.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 12.50 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Path / |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source file and lines | par_multi_interp.c:1747-1837 |
| Module | exec |
| nb instructions | 69 |
| nb uops | 69 |
| loop length | 309 |
| used x86 registers | 12 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 13 |
| micro-operation queue | 18.00 cycles |
| front end | 18.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 9.25 | 9.25 | 13.50 | 13.50 | 0.00 | 9.25 | 9.25 | 0.00 |
| cycles | 9.25 | 9.25 | 13.50 | 13.50 | 0.00 | 9.25 | 9.25 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| FE+BE cycles | 18.18 |
| Stall cycles | 0.00 |
| Front-end | 18.00 |
| Dispatch | 13.50 |
| Overall L1 | 18.00 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 12% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x30(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| INC %RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JE 448fc0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%RDX,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RBX,(%RAX,%R11,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JNE 448cc0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%R11,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%RAX,%R11,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %RBX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SUB %RDI,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JLE 448e44 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMP $0x4,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 448d00 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| JMP 448de0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMPQ $-0x3,(%RAX,%R11,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JE 448c68 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMPQ $0x1,-0xe8(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JE 448ced | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RCX,%RBX,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP (%RCX,%R11,8),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JNE 448c68 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| VADDSD (%R13,%RDX,8),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| JMP 448c68 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| LEA 0x18(,%RDI,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x4,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 448e40 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| ADD %RAX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 448e44 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%R11,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%RAX,%R11,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %R11,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SUB %RDI,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JLE 448c60 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMP $0x4,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| JAE 448e80 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| JMP 448f50 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x2,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| LEA 0x18(,%RDI,8),%RBX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x4,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R10,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 448c60 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| ADD %RCX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x30(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 448c68 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| Function | hypre_BoomerAMGBuildMultipass.extracted.28 |
| Source file and lines | par_multi_interp.c:1747-1837 |
| Module | exec |
| nb instructions | 69 |
| nb uops | 69 |
| loop length | 309 |
| used x86 registers | 12 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 13 |
| micro-operation queue | 18.00 cycles |
| front end | 18.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 9.25 | 9.25 | 13.50 | 13.50 | 0.00 | 9.25 | 9.25 | 0.00 |
| cycles | 9.25 | 9.25 | 13.50 | 13.50 | 0.00 | 9.25 | 9.25 | 0.00 |
| Cycles executing div or sqrt instructions | NA |
| FE+BE cycles | 18.18 |
| Stall cycles | 0.00 |
| Front-end | 18.00 |
| Dispatch | 13.50 |
| Overall L1 | 18.00 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 12% |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 12% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 12% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x30(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| INC %RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JE 448fc0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0x170(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%RDX,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x90(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RBX,(%RAX,%R11,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JNE 448cc0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%R11,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%RAX,%R11,8),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %RBX,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SUB %RDI,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JLE 448e44 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMP $0x4,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 448d00 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| JMP 448de0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV -0x158(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMPQ $-0x3,(%RAX,%R11,8) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JE 448c68 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMPQ $0x1,-0xe8(%RBP) | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JE 448ced | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xc8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RCX,%RBX,8),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP (%RCX,%R11,8),%RAX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JNE 448c68 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| VADDSD (%R13,%RDX,8),%XMM0,%XMM0 | 1 | 0.50 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| JMP 448c68 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x2,%RAX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| LEA 0x18(,%RDI,8),%RCX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV -0x48(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R10,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x4,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R10,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 448e40 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| ADD %RAX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV -0x80(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x48(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 448e44 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV -0x40(%RBP),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0xc0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%R11,8),%RDI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%RAX,%R11,8),%R11 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %R11,%R10 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SUB %RDI,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JLE 448c60 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMP $0x4,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV -0xa0(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| JAE 448e80 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| JMP 448f50 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x2,%RCX | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| LEA 0x18(,%RDI,8),%RBX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x4,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R10,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 448c60 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| ADD %RCX,%RDI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV -0x50(%RBP),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x30(%RBP),%RBX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 448c68 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
