| Loop Id: 869 | Module: exec | Source: par_multi_interp.c:917-1133 [...] | Coverage: 0.22% |
|---|
| Loop Id: 869 | Module: exec | Source: par_multi_interp.c:917-1133 [...] | Coverage: 0.22% |
|---|
0x4443c0 MOV -0xa8(%RBP),%RCX |
0x4443c7 INC %RCX |
0x4443ca CMP -0xe0(%RBP),%RCX |
0x4443d1 JGE 444381 |
0x4443d3 MOV -0x80(%RBP),%RAX |
0x4443d7 MOV %RCX,-0xa8(%RBP) |
0x4443de MOV (%RAX,%RCX,8),%RCX |
0x4443e2 MOV -0xb8(%RBP),%RAX |
0x4443e9 MOV (%RAX,%RCX,8),%RDX |
0x4443ed MOV %RCX,%RSI |
0x4443f0 NOT %RSI |
0x4443f3 MOV %RCX,-0x50(%RBP) |
0x4443f7 CMP 0x8(%RAX,%RCX,8),%RDX |
0x4443fc JGE 444730 |
0x444402 MOV -0xa0(%RBP),%RAX |
0x444409 MOV (%RAX),%R10 |
0x44440c LEA -0x1(%R10),%RDI |
0x444410 MOV %RDI,-0x88(%RBP) |
0x444417 JMP 444448 |
(872) 0x444420 MOV -0x60(%RBP),%R13 |
(872) 0x444424 MOV -0x48(%RBP),%RDX |
(872) 0x444428 MOV -0x88(%RBP),%RDI |
(872) 0x44442f INC %RDX |
(872) 0x444432 MOV -0xb8(%RBP),%RAX |
(872) 0x444439 MOV -0x50(%RBP),%RCX |
(872) 0x44443d CMP 0x8(%RAX,%RCX,8),%RDX |
(872) 0x444442 JGE 444730 |
(872) 0x444448 MOV -0x128(%RBP),%RAX |
(872) 0x44444f MOV (%RAX,%RDX,8),%R8 |
(872) 0x444453 MOV -0x118(%RBP),%RAX |
(872) 0x44445a CMP %RDI,(%RAX,%R8,8) |
(872) 0x44445e JNE 44442f |
(872) 0x444460 MOV %RDX,-0x48(%RBP) |
(872) 0x444464 MOV -0x30(%RBP),%RAX |
(872) 0x444468 MOV 0x8(%RAX,%R8,8),%RBX |
(872) 0x44446d TEST %RBX,%RBX |
(872) 0x444470 JLE 4445de |
(872) 0x444476 MOV -0x68(%RBP),%RAX |
(872) 0x44447a MOV %R8,-0x90(%RBP) |
(872) 0x444481 MOV (%RAX,%R8,8),%RDI |
(872) 0x444485 ADD %RDI,%RBX |
(872) 0x444488 MOV -0x40(%RBP),%RAX |
(872) 0x44448c MOV -0x8(%RAX,%R10,8),%RCX |
(872) 0x444491 LEA 0x1(%RDI),%RAX |
(872) 0x444495 CMP %RAX,%RBX |
(872) 0x444498 CMOVLE %RAX,%RBX |
(872) 0x44449c MOV %RBX,-0x58(%RBP) |
(872) 0x4444a0 SUB %RDI,%RBX |
(872) 0x4444a3 CMP $0x4,%RBX |
(872) 0x4444a7 MOV %RCX,-0xe8(%RBP) |
(872) 0x4444ae JAE 44450b |
(872) 0x4444b0 MOV %RBX,%RAX |
(872) 0x4444b3 AND $-0x4,%RAX |
(872) 0x4444b7 CMP %RBX,%RAX |
(872) 0x4444ba JAE 4445d3 |
(872) 0x4444c0 ADD %RAX,%RDI |
(872) 0x4444c3 MOV -0x60(%RBP),%R13 |
(872) 0x4444c7 MOV -0x90(%RBP),%R8 |
(872) 0x4444ce MOV -0xe8(%RBP),%RBX |
(872) 0x4444d5 MOV -0x58(%RBP),%RCX |
(872) 0x4444d9 JMP 4444ec |
(875) 0x4444e0 INC %RDI |
(875) 0x4444e3 CMP %RDI,%RCX |
(875) 0x4444e6 JE 4445de |
(875) 0x4444ec MOV (%RBX,%RDI,8),%RDX |
(875) 0x4444f0 CMP %RSI,(%R14,%RDX,8) |
(875) 0x4444f4 JE 4444e0 |
(875) 0x4444f6 MOV -0x40(%RBP),%RAX |
(875) 0x4444fa MOV (%RAX,%R10,8),%RAX |
(875) 0x4444fe MOV %RDX,(%RAX,%R11,8) |
(875) 0x444502 INC %R11 |
(875) 0x444505 MOV %RSI,(%R14,%RDX,8) |
(875) 0x444509 JMP 4444e0 |
(872) 0x44450b MOV %RBX,%R8 |
(872) 0x44450e SHR $0x2,%R8 |
(872) 0x444512 LEA (%RCX,%RDI,8),%R13 |
(872) 0x444516 ADD $0x18,%R13 |
(872) 0x44451a JMP 444529 |
(876) 0x444520 ADD $0x20,%R13 |
(876) 0x444524 DEC %R8 |
(876) 0x444527 JE 4444b0 |
(876) 0x444529 MOV -0x18(%R13),%R12 |
(876) 0x44452d CMP %RSI,(%R14,%R12,8) |
(876) 0x444531 JNE 444560 |
(876) 0x444533 MOV -0x10(%R13),%RDX |
(876) 0x444537 CMP %RSI,(%R14,%RDX,8) |
(876) 0x44453b JNE 44457d |
(876) 0x44453d MOV -0x8(%R13),%RDX |
(876) 0x444541 CMP %RSI,(%R14,%RDX,8) |
(876) 0x444545 JNE 44459a |
(876) 0x444547 MOV (%R13),%RDX |
(876) 0x44454b CMP %RSI,(%R14,%RDX,8) |
(876) 0x44454f JE 444520 |
(876) 0x444551 JMP 4445bb |
(876) 0x444560 MOV -0x40(%RBP),%RAX |
(876) 0x444564 MOV (%RAX,%R10,8),%RAX |
(876) 0x444568 MOV %R12,(%RAX,%R11,8) |
(876) 0x44456c INC %R11 |
(876) 0x44456f MOV %RSI,(%R14,%R12,8) |
(876) 0x444573 MOV -0x10(%R13),%RDX |
(876) 0x444577 CMP %RSI,(%R14,%RDX,8) |
(876) 0x44457b JE 44453d |
(876) 0x44457d MOV -0x40(%RBP),%RAX |
(876) 0x444581 MOV (%RAX,%R10,8),%RAX |
(876) 0x444585 MOV %RDX,(%RAX,%R11,8) |
(876) 0x444589 INC %R11 |
(876) 0x44458c MOV %RSI,(%R14,%RDX,8) |
(876) 0x444590 MOV -0x8(%R13),%RDX |
(876) 0x444594 CMP %RSI,(%R14,%RDX,8) |
(876) 0x444598 JE 444547 |
(876) 0x44459a MOV -0x40(%RBP),%RAX |
(876) 0x44459e MOV (%RAX,%R10,8),%RAX |
(876) 0x4445a2 MOV %RDX,(%RAX,%R11,8) |
(876) 0x4445a6 INC %R11 |
(876) 0x4445a9 MOV %RSI,(%R14,%RDX,8) |
(876) 0x4445ad MOV (%R13),%RDX |
(876) 0x4445b1 CMP %RSI,(%R14,%RDX,8) |
(876) 0x4445b5 JE 444520 |
(876) 0x4445bb MOV -0x40(%RBP),%RAX |
(876) 0x4445bf MOV (%RAX,%R10,8),%RAX |
(876) 0x4445c3 MOV %RDX,(%RAX,%R11,8) |
(876) 0x4445c7 INC %R11 |
(876) 0x4445ca MOV %RSI,(%R14,%RDX,8) |
(876) 0x4445ce JMP 444520 |
(872) 0x4445d3 MOV -0x60(%RBP),%R13 |
(872) 0x4445d7 MOV -0x90(%RBP),%R8 |
(872) 0x4445de MOV -0x70(%RBP),%RAX |
(872) 0x4445e2 MOV 0x8(%RAX,%R8,8),%R12 |
(872) 0x4445e7 TEST %R12,%R12 |
(872) 0x4445ea JLE 444424 |
(872) 0x4445f0 MOV (%R13,%R8,8),%RDI |
(872) 0x4445f5 ADD %RDI,%R12 |
(872) 0x4445f8 MOV -0x38(%RBP),%RAX |
(872) 0x4445fc MOV -0x8(%RAX,%R10,8),%R13 |
(872) 0x444601 LEA 0x1(%RDI),%RAX |
(872) 0x444605 CMP %RAX,%R12 |
(872) 0x444608 CMOVLE %RAX,%R12 |
(872) 0x44460c MOV %R12,%R8 |
(872) 0x44460f SUB %RDI,%R8 |
(872) 0x444612 CMP $0x4,%R8 |
(872) 0x444616 JAE 44465c |
(872) 0x444618 MOV %R8,%RAX |
(872) 0x44461b AND $-0x4,%RAX |
(872) 0x44461f CMP %R8,%RAX |
(872) 0x444622 JAE 444420 |
(872) 0x444628 ADD %RAX,%RDI |
(872) 0x44462b JMP 44463c |
(873) 0x444630 INC %RDI |
(873) 0x444633 CMP %RDI,%R12 |
(873) 0x444636 JE 444420 |
(873) 0x44463c MOV (%R13,%RDI,8),%RAX |
(873) 0x444641 CMP %RSI,(%R15,%RAX,8) |
(873) 0x444645 JE 444630 |
(873) 0x444647 MOV -0x38(%RBP),%RCX |
(873) 0x44464b MOV (%RCX,%R10,8),%RCX |
(873) 0x44464f MOV %RAX,(%RCX,%R9,8) |
(873) 0x444653 INC %R9 |
(873) 0x444656 MOV %RSI,(%R15,%RAX,8) |
(873) 0x44465a JMP 444630 |
(872) 0x44465c MOV %R8,%RBX |
(872) 0x44465f SHR $0x2,%RBX |
(872) 0x444663 LEA 0x18(,%RDI,8),%RDX |
(872) 0x44466b ADD %R13,%RDX |
(872) 0x44466e JMP 444679 |
(874) 0x444670 ADD $0x20,%RDX |
(874) 0x444674 DEC %RBX |
(874) 0x444677 JE 444618 |
(874) 0x444679 MOV -0x18(%RDX),%RAX |
(874) 0x44467d CMP %RSI,(%R15,%RAX,8) |
(874) 0x444681 JNE 4446b0 |
(874) 0x444683 MOV -0x10(%RDX),%RAX |
(874) 0x444687 CMP %RSI,(%R15,%RAX,8) |
(874) 0x44468b JNE 4446cd |
(874) 0x44468d MOV -0x8(%RDX),%RAX |
(874) 0x444691 CMP %RSI,(%R15,%RAX,8) |
(874) 0x444695 JNE 4446ea |
(874) 0x444697 MOV (%RDX),%RAX |
(874) 0x44469a CMP %RSI,(%R15,%RAX,8) |
(874) 0x44469e JE 444670 |
(874) 0x4446a0 JMP 44470a |
(874) 0x4446b0 MOV -0x38(%RBP),%RCX |
(874) 0x4446b4 MOV (%RCX,%R10,8),%RCX |
(874) 0x4446b8 MOV %RAX,(%RCX,%R9,8) |
(874) 0x4446bc INC %R9 |
(874) 0x4446bf MOV %RSI,(%R15,%RAX,8) |
(874) 0x4446c3 MOV -0x10(%RDX),%RAX |
(874) 0x4446c7 CMP %RSI,(%R15,%RAX,8) |
(874) 0x4446cb JE 44468d |
(874) 0x4446cd MOV -0x38(%RBP),%RCX |
(874) 0x4446d1 MOV (%RCX,%R10,8),%RCX |
(874) 0x4446d5 MOV %RAX,(%RCX,%R9,8) |
(874) 0x4446d9 INC %R9 |
(874) 0x4446dc MOV %RSI,(%R15,%RAX,8) |
(874) 0x4446e0 MOV -0x8(%RDX),%RAX |
(874) 0x4446e4 CMP %RSI,(%R15,%RAX,8) |
(874) 0x4446e8 JE 444697 |
(874) 0x4446ea MOV -0x38(%RBP),%RCX |
(874) 0x4446ee MOV (%RCX,%R10,8),%RCX |
(874) 0x4446f2 MOV %RAX,(%RCX,%R9,8) |
(874) 0x4446f6 INC %R9 |
(874) 0x4446f9 MOV %RSI,(%R15,%RAX,8) |
(874) 0x4446fd MOV (%RDX),%RAX |
(874) 0x444700 CMP %RSI,(%R15,%RAX,8) |
(874) 0x444704 JE 444670 |
(874) 0x44470a MOV -0x38(%RBP),%RCX |
(874) 0x44470e MOV (%RCX,%R10,8),%RCX |
(874) 0x444712 MOV %RAX,(%RCX,%R9,8) |
(874) 0x444716 INC %R9 |
(874) 0x444719 MOV %RSI,(%R15,%RAX,8) |
(874) 0x44471d JMP 444670 |
0x444730 MOV -0xb0(%RBP),%RAX |
0x444737 MOV -0x50(%RBP),%RCX |
0x44473b MOV (%RAX,%RCX,8),%R10 |
0x44473f MOV 0x8(%RAX,%RCX,8),%RDX |
0x444744 CMP %RDX,%R10 |
0x444747 JGE 4443c0 |
0x44474d MOV -0xa0(%RBP),%RAX |
0x444754 MOV (%RAX),%R12 |
0x444757 LEA -0x1(%R12),%R8 |
0x44475c JMP 44477c |
(870) 0x444760 MOV -0xb0(%RBP),%RAX |
(870) 0x444767 MOV -0x50(%RBP),%RCX |
(870) 0x44476b MOV 0x8(%RAX,%RCX,8),%RDX |
(870) 0x444770 INC %R10 |
(870) 0x444773 CMP %RDX,%R10 |
(870) 0x444776 JGE 4443c0 |
(870) 0x44477c MOV -0x130(%RBP),%RAX |
(870) 0x444783 MOV (%RAX,%R10,8),%RAX |
(870) 0x444787 MOV -0x120(%RBP),%RCX |
(870) 0x44478e CMP %R8,(%RCX,%RAX,8) |
(870) 0x444792 JNE 444770 |
(870) 0x444794 MOV -0x110(%RBP),%RCX |
(870) 0x44479b MOV 0x8(%RCX,%RAX,8),%RBX |
(870) 0x4447a0 TEST %RBX,%RBX |
(870) 0x4447a3 JLE 444770 |
(870) 0x4447a5 MOV -0x100(%RBP),%RCX |
(870) 0x4447ac MOV (%RCX,%RAX,8),%RDI |
(870) 0x4447b0 ADD %RDI,%RBX |
(870) 0x4447b3 MOV -0x108(%RBP),%RAX |
(870) 0x4447ba MOV (%RAX,%R12,8),%RDX |
(870) 0x4447be LEA 0x1(%RDI),%RAX |
(870) 0x4447c2 CMP %RAX,%RBX |
(870) 0x4447c5 CMOVLE %RAX,%RBX |
(870) 0x4447c9 JMP 4447d8 |
(871) 0x4447d0 INC %RDI |
(871) 0x4447d3 CMP %RDI,%RBX |
(871) 0x4447d6 JE 444760 |
(871) 0x4447d8 MOV (%RDX,%RDI,8),%RAX |
(871) 0x4447dc TEST %RAX,%RAX |
(871) 0x4447df JS 444800 |
(871) 0x4447e1 CMP %RSI,(%R15,%RAX,8) |
(871) 0x4447e5 JE 4447d0 |
(871) 0x4447e7 MOV -0x38(%RBP),%RCX |
(871) 0x4447eb MOV (%RCX,%R12,8),%RCX |
(871) 0x4447ef MOV %RAX,(%RCX,%R9,8) |
(871) 0x4447f3 INC %R9 |
(871) 0x4447f6 MOV %RSI,(%R15,%RAX,8) |
(871) 0x4447fa JMP 4447d0 |
(871) 0x444800 NOT %RAX |
(871) 0x444803 CMP %RSI,(%R14,%RAX,8) |
(871) 0x444807 JE 4447d0 |
(871) 0x444809 MOV -0x40(%RBP),%RCX |
(871) 0x44480d MOV (%RCX,%R12,8),%RCX |
(871) 0x444811 MOV %RAX,(%RCX,%R11,8) |
(871) 0x444815 INC %R11 |
(871) 0x444818 MOV %RSI,(%R14,%RAX,8) |
(871) 0x44481c JMP 4447d0 |
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/parcsr_ls/par_multi_interp.c: 917 - 1133 |
-------------------------------------------------------------------------------- |
917: for (i=0; i < n_coarse; i++) |
[...] |
1072: for (i=thread_start; i < thread_stop; i++) |
1073: { |
1074: i1 = pass_array[i]; |
1075: for (j=S_diag_i[i1]; j < S_diag_i[i1+1]; j++) |
1076: { |
1077: j1 = S_diag_j[j]; |
1078: if (assigned[j1] == pass-1) |
1079: { |
1080: j_start = P_diag_start[j1]; |
1081: j_end = j_start+P_diag_i[j1+1]; |
1082: for (k=j_start; k < j_end; k++) |
1083: { |
1084: k1 = P_diag_pass[pass-1][k]; |
1085: if (P_marker[k1] != -i1-1) |
1086: { |
1087: P_diag_pass[pass][cnt_nz++] = k1; |
1088: P_marker[k1] = -i1-1; |
1089: } |
1090: } |
1091: j_start = P_offd_start[j1]; |
1092: j_end = j_start+P_offd_i[j1+1]; |
1093: for (k=j_start; k < j_end; k++) |
1094: { |
1095: k1 = P_offd_pass[pass-1][k]; |
1096: if (P_marker_offd[k1] != -i1-1) |
1097: { |
1098: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1099: P_marker_offd[k1] = -i1-1; |
1100: } |
1101: } |
1102: } |
1103: } |
1104: for (j=S_offd_i[i1]; j < S_offd_i[i1+1]; j++) |
1105: { |
1106: j1 = S_offd_j[j]; |
1107: if (assigned_offd[j1] == pass-1) |
1108: { |
1109: j_start = Pext_start[j1]; |
1110: j_end = j_start+Pext_i[j1+1]; |
1111: for (k=j_start; k < j_end; k++) |
1112: { |
1113: k1 = Pext_pass[pass][k]; |
1114: if (k1 < 0) |
1115: { |
1116: if (P_marker[-k1-1] != -i1-1) |
1117: { |
1118: P_diag_pass[pass][cnt_nz++] = -k1-1; |
1119: P_marker[-k1-1] = -i1-1; |
1120: } |
1121: } |
1122: else if (P_marker_offd[k1] != -i1-1) |
1123: { |
1124: P_offd_pass[pass][cnt_nz_offd++] = k1; |
1125: P_marker_offd[k1] = -i1-1; |
[...] |
1133: if ( (n_coarse_offd) || (new_num_cols_offd == local_index+1) ) |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_fork_call | libiomp5.so | |
| ○ | __kmpc_fork_call | libiomp5.so | |
| ○ | hypre_BoomerAMGBuildMultipass | par_multi_interp.c:891 | exec |
| ○ | hypre_BoomerAMGSetup | par_amg_setup.c:737 | exec |
| ○ | hypre_PCGSetup | pcg.c:234 | exec |
| ○ | main | amg.c:398 | exec |
| ○ | __libc_init_first | libc.so.6 |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 2.50 |
| Bottlenecks | micro-operation queue, P2, P3, |
| Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
| Source | par_multi_interp.c:917-1133 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.50 |
| CQA cycles if no scalar integer | 7.50 |
| CQA cycles if FP arith vectorized | 7.50 |
| CQA cycles if fully vectorized | 0.94 |
| Front-end cycles | 7.50 |
| DIV/SQRT cycles | 3.00 |
| P0 cycles | 3.00 |
| P1 cycles | 7.50 |
| P2 cycles | 7.50 |
| P3 cycles | 3.00 |
| P4 cycles | 3.00 |
| P5 cycles | 3.00 |
| P6 cycles | 3.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | 7.70 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 29.00 |
| Nb uops | 29.00 |
| Nb loads | 15.00 |
| Nb stores | 3.00 |
| Nb stack references | 8.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 19.20 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 120.00 |
| Bytes stored | 24.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 12.50 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 8.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 2.50 |
| Bottlenecks | micro-operation queue, P2, P3, |
| Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
| Source | par_multi_interp.c:917-1133 |
| Source loop unroll info | NA |
| Source loop unroll confidence level | NA |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 7.50 |
| CQA cycles if no scalar integer | 7.50 |
| CQA cycles if FP arith vectorized | 7.50 |
| CQA cycles if fully vectorized | 0.94 |
| Front-end cycles | 7.50 |
| DIV/SQRT cycles | 3.00 |
| P0 cycles | 3.00 |
| P1 cycles | 7.50 |
| P2 cycles | 7.50 |
| P3 cycles | 3.00 |
| P4 cycles | 3.00 |
| P5 cycles | 3.00 |
| P6 cycles | 3.00 |
| P7 cycles | 0.00 |
| Inter-iter dependencies cycles | NA |
| FE+BE cycles (UFS) | 7.70 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 29.00 |
| Nb uops | 29.00 |
| Nb loads | 15.00 |
| Nb stores | 3.00 |
| Nb stack references | 8.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 19.20 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 120.00 |
| Bytes stored | 24.00 |
| Stride 0 | NA |
| Stride 1 | NA |
| Stride n | NA |
| Stride unknown | NA |
| Stride indirect | NA |
| Vectorization ratio all | 0.00 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | 0.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 12.50 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | 12.50 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 12.50 |
| Path / |
| Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
| Source file and lines | par_multi_interp.c:917-1133 |
| Module | exec |
| nb instructions | 29 |
| nb uops | 29 |
| loop length | 135 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 8 |
| micro-operation queue | 7.50 cycles |
| front end | 7.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 3.00 | 3.00 | 7.50 | 7.50 | 3.00 | 3.00 | 3.00 | 3.00 |
| cycles | 3.00 | 3.00 | 7.50 | 7.50 | 3.00 | 3.00 | 3.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| FE+BE cycles | 7.70 |
| Stall cycles | 0.00 |
| Front-end | 7.50 |
| Dispatch | 7.50 |
| Overall L1 | 7.50 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP -0xe0(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JGE 444381 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV (%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %RCX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOT %RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| CMP 0x8(%RAX,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JGE 444730 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| LEA -0x1(%R10),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV %RDI,-0x88(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| JMP 444448 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%RCX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RDX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 4443c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| LEA -0x1(%R12),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| JMP 44477c | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| Function | hypre_BoomerAMGBuildMultipass.extracted.34 |
| Source file and lines | par_multi_interp.c:917-1133 |
| Module | exec |
| nb instructions | 29 |
| nb uops | 29 |
| loop length | 135 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 8 |
| micro-operation queue | 7.50 cycles |
| front end | 7.50 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 3.00 | 3.00 | 7.50 | 7.50 | 3.00 | 3.00 | 3.00 | 3.00 |
| cycles | 3.00 | 3.00 | 7.50 | 7.50 | 3.00 | 3.00 | 3.00 | 3.00 |
| Cycles executing div or sqrt instructions | NA |
| FE+BE cycles | 7.70 |
| Stall cycles | 0.00 |
| Front-end | 7.50 |
| Dispatch | 7.50 |
| Overall L1 | 7.50 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 0% |
| all | 12% |
| load | 12% |
| store | 12% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV -0xa8(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| INC %RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP -0xe0(%RBP),%RCX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JGE 444381 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0x80(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %RCX,-0xa8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV (%RAX,%RCX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0xb8(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV %RCX,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOT %RSI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV %RCX,-0x50(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| CMP 0x8(%RAX,%RCX,8),%RDX | 1 | 0.25 | 0.25 | 0.50 | 0.50 | 0 | 0.25 | 0.25 | 0 | 1 | 0.50 |
| JGE 444730 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| LEA -0x1(%R10),%RDI | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV %RDI,-0x88(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| JMP 444448 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| MOV -0xb0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x50(%RBP),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX,%RCX,8),%R10 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV 0x8(%RAX,%RCX,8),%RDX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP %RDX,%R10 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JGE 4443c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV -0xa0(%RBP),%RAX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV (%RAX),%R12 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| LEA -0x1(%R12),%R8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| JMP 44477c | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
