| Function: hypre_CSRMatrixSetRownnz | Module: exec | Source: csr_matrix.c:136-168 [...] | Coverage: 0.01% |
|---|
| Function: hypre_CSRMatrixSetRownnz | Module: exec | Source: csr_matrix.c:136-168 [...] | Coverage: 0.01% |
|---|
/home/kcamus/qaas_runs/169-443-9681/intel/AMG/build/AMG/AMG/seq_mv/csr_matrix.c: 136 - 168 |
-------------------------------------------------------------------------------- |
136: { |
137: HYPRE_Int ierr=0; |
138: HYPRE_Int num_rows = hypre_CSRMatrixNumRows(matrix); |
139: HYPRE_Int *A_i = hypre_CSRMatrixI(matrix); |
[...] |
145: for (i=0; i < num_rows; i++) |
146: { |
147: adiag = (A_i[i+1] - A_i[i]); |
148: if(adiag > 0) irownnz++; |
149: } |
150: |
151: hypre_CSRMatrixNumRownnz(matrix) = irownnz; |
152: |
153: if ((irownnz == 0) || (irownnz == num_rows)) |
154: { |
155: hypre_CSRMatrixRownnz(matrix) = NULL; |
156: } |
157: else |
158: { |
159: Arownnz = hypre_CTAlloc(HYPRE_Int, irownnz); |
160: irownnz = 0; |
161: for (i=0; i < num_rows; i++) |
162: { |
163: adiag = A_i[i+1]-A_i[i]; |
164: if(adiag > 0) Arownnz[irownnz++] = i; |
165: } |
166: hypre_CSRMatrixRownnz(matrix) = Arownnz; |
167: } |
168: return ierr; |
0x4e6650 PUSH %RBP |
0x4e6651 MOV %RSP,%RBP |
0x4e6654 SUB $0x20,%RSP |
0x4e6658 MOV 0x10(%RDI),%R9 |
0x4e665c TEST %R9,%R9 |
0x4e665f JLE 4e6680 |
0x4e6661 MOV (%RDI),%R8 |
0x4e6664 CMP $0x8,%R9 |
0x4e6668 JAE 4e66a0 |
0x4e666a XOR %EAX,%EAX |
0x4e666c JMP 4e670e |
0x4e6671 NOPW %CS:(%RAX,%RAX,1) |
0x4e6680 MOVQ $0,0x40(%RDI) |
0x4e6688 JMP 4e67c0 |
0x4e668d NOPW %CS:(%RAX,%RAX,1) |
0x4e669c NOPL (%RAX) |
0x4e66a0 MOV %R9,%RSI |
0x4e66a3 SHR $0x3,%RSI |
0x4e66a7 MOV (%R8),%RCX |
0x4e66aa LEA 0x8(%R8),%RDX |
0x4e66ae XOR %EAX,%EAX |
0x4e66b0 VMOVDQU 0x2c9e8(%RIP),%YMM0 |
0x4e66b8 NOPL (%RAX,%RAX,1) |
(3884) 0x4e66c0 VMOVDQU (%RDX),%YMM1 |
(3884) 0x4e66c4 VMOVDQU 0x20(%RDX),%YMM2 |
(3884) 0x4e66c9 VMOVQ %RCX,%XMM3 |
(3884) 0x4e66ce VMOVDQA %YMM1,%YMM4 |
(3884) 0x4e66d2 VPERMT2Q %YMM3,%YMM0,%YMM4 |
(3884) 0x4e66d8 VALIGNQ $0x3,%YMM1,%YMM2,%YMM3 |
(3884) 0x4e66df VPCMPGTQ %YMM3,%YMM2,%K0 |
(3884) 0x4e66e5 KSHIFTLB $0x4,%K0,%K0 |
(3884) 0x4e66eb VPCMPGTQ %YMM4,%YMM1,%K1 |
(3884) 0x4e66f1 KORB %K0,%K1,%K0 |
(3884) 0x4e66f5 KMOVB %K0,%ECX |
(3884) 0x4e66f9 POPCNT %RCX,%RCX |
(3884) 0x4e66fe ADD %RCX,%RAX |
(3884) 0x4e6701 MOV 0x38(%RDX),%RCX |
(3884) 0x4e6705 ADD $0x40,%RDX |
(3884) 0x4e6709 DEC %RSI |
(3884) 0x4e670c JNE 4e66c0 |
0x4e670e MOV %R9,%RDX |
0x4e6711 AND $-0x8,%RDX |
0x4e6715 CMP %R9,%RDX |
0x4e6718 JAE 4e673c |
0x4e671a MOV (%R8,%RDX,8),%RCX |
0x4e671e XCHG %AX,%AX |
(3887) 0x4e6720 MOV 0x8(%R8,%RDX,8),%R10 |
(3887) 0x4e6725 INC %RDX |
(3887) 0x4e6728 XOR %ESI,%ESI |
(3887) 0x4e672a CMP %RCX,%R10 |
(3887) 0x4e672d SETG %SIL |
(3887) 0x4e6731 ADD %RSI,%RAX |
(3887) 0x4e6734 MOV %R10,%RCX |
(3887) 0x4e6737 CMP %RDX,%R9 |
(3887) 0x4e673a JNE 4e6720 |
0x4e673c MOV %RAX,0x40(%RDI) |
0x4e6740 TEST %RAX,%RAX |
0x4e6743 JE 4e67c0 |
0x4e6745 CMP %R9,%RAX |
0x4e6748 JE 4e67c0 |
0x4e674a MOV $0x8,%ESI |
0x4e674f MOV %RDI,-0x18(%RBP) |
0x4e6753 MOV %RAX,%RDI |
0x4e6756 MOV %R9,-0x8(%RBP) |
0x4e675a MOV %R8,-0x10(%RBP) |
0x4e675e VZEROUPPER |
0x4e6761 CALL 4f3da0 <hypre_CAlloc> |
0x4e6766 MOV -0x10(%RBP),%RSI |
0x4e676a MOV -0x8(%RBP),%R9 |
0x4e676e MOV -0x18(%RBP),%R8 |
0x4e6772 CMP $0x4,%R9 |
0x4e6776 JAE 4e67e0 |
0x4e6778 XOR %R10D,%R10D |
0x4e677b MOV %R9,%RCX |
0x4e677e AND $-0x4,%RCX |
0x4e6782 CMP %R9,%RCX |
0x4e6785 JB 4e67a8 |
0x4e6787 MOV %RAX,0x38(%R8) |
0x4e678b XOR %EAX,%EAX |
0x4e678d ADD $0x20,%RSP |
0x4e6791 POP %RBP |
0x4e6792 RET |
0x4e6793 NOPW %CS:(%RAX,%RAX,1) |
(3885) 0x4e67a0 MOV %RDX,%RCX |
(3885) 0x4e67a3 CMP %RDX,%R9 |
(3885) 0x4e67a6 JE 4e6787 |
(3885) 0x4e67a8 LEA 0x1(%RCX),%RDX |
(3885) 0x4e67ac MOV 0x8(%RSI,%RCX,8),%RDI |
(3885) 0x4e67b1 CMP (%RSI,%RCX,8),%RDI |
(3885) 0x4e67b5 JLE 4e67a0 |
(3885) 0x4e67b7 MOV %RCX,(%RAX,%R10,8) |
(3885) 0x4e67bb INC %R10 |
(3885) 0x4e67be JMP 4e67a0 |
0x4e67c0 MOVQ $0,0x38(%RDI) |
0x4e67c8 XOR %EAX,%EAX |
0x4e67ca ADD $0x20,%RSP |
0x4e67ce POP %RBP |
0x4e67cf VZEROUPPER |
0x4e67d2 RET |
0x4e67d3 NOPW %CS:(%RAX,%RAX,1) |
0x4e67e0 MOV %R9,%R11 |
0x4e67e3 SHR $0x2,%R11 |
0x4e67e7 MOV $0x2,%EDX |
0x4e67ec XOR %R10D,%R10D |
0x4e67ef JMP 4e680d |
0x4e67f1 NOPW %CS:(%RAX,%RAX,1) |
(3886) 0x4e6800 ADD $0x4,%RDX |
(3886) 0x4e6804 DEC %R11 |
(3886) 0x4e6807 JE 4e677b |
(3886) 0x4e680d MOV -0x8(%RSI,%RDX,8),%RDI |
(3886) 0x4e6812 CMP -0x10(%RSI,%RDX,8),%RDI |
(3886) 0x4e6817 JG 4e6840 |
(3886) 0x4e6819 MOV (%RSI,%RDX,8),%RCX |
(3886) 0x4e681d CMP %RDI,%RCX |
(3886) 0x4e6820 JG 4e6859 |
(3886) 0x4e6822 MOV 0x8(%RSI,%RDX,8),%RDI |
(3886) 0x4e6827 CMP %RCX,%RDI |
(3886) 0x4e682a JG 4e6872 |
(3886) 0x4e682c CMP %RDI,0x10(%RSI,%RDX,8) |
(3886) 0x4e6831 JLE 4e6800 |
(3886) 0x4e6833 JMP 4e6889 |
0x4e6835 NOPW %CS:(%RAX,%RAX,1) |
(3886) 0x4e6840 LEA -0x2(%RDX),%RCX |
(3886) 0x4e6844 MOV %RCX,(%RAX,%R10,8) |
(3886) 0x4e6848 INC %R10 |
(3886) 0x4e684b MOV -0x8(%RSI,%RDX,8),%RDI |
(3886) 0x4e6850 MOV (%RSI,%RDX,8),%RCX |
(3886) 0x4e6854 CMP %RDI,%RCX |
(3886) 0x4e6857 JLE 4e6822 |
(3886) 0x4e6859 LEA -0x1(%RDX),%RCX |
(3886) 0x4e685d MOV %RCX,(%RAX,%R10,8) |
(3886) 0x4e6861 INC %R10 |
(3886) 0x4e6864 MOV (%RSI,%RDX,8),%RCX |
(3886) 0x4e6868 MOV 0x8(%RSI,%RDX,8),%RDI |
(3886) 0x4e686d CMP %RCX,%RDI |
(3886) 0x4e6870 JLE 4e682c |
(3886) 0x4e6872 MOV %RDX,(%RAX,%R10,8) |
(3886) 0x4e6876 INC %R10 |
(3886) 0x4e6879 MOV 0x8(%RSI,%RDX,8),%RDI |
(3886) 0x4e687e CMP %RDI,0x10(%RSI,%RDX,8) |
(3886) 0x4e6883 JLE 4e6800 |
(3886) 0x4e6889 LEA 0x1(%RDX),%RCX |
(3886) 0x4e688d MOV %RCX,(%RAX,%R10,8) |
(3886) 0x4e6891 INC %R10 |
(3886) 0x4e6894 JMP 4e6800 |
0x4e6899 NOPL (%RAX) |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | hypre_IJMatrixAssembleParCSR | IJMatrix_parcsr.c:2823 | exec |
| ○ | BuildIJLaplacian27pt | amg.c:2267 | exec |
| ○ | main | amg.c:274 | exec |
| ○ | __libc_init_first | libc.so.6 |
| Path / |
| Source file and lines | csr_matrix.c:136-168 |
| Module | exec |
| nb instructions | 72 |
| nb uops | 79 |
| loop length | 312 |
| used x86 registers | 11 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 1 |
| used zmm registers | 0 |
| nb stack references | 3 |
| micro-operation queue | 19.75 cycles |
| front end | 19.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 7.50 | 7.50 | 7.00 | 7.00 | 9.00 | 7.50 | 7.50 | 7.00 |
| cycles | 7.50 | 7.50 | 7.00 | 7.00 | 9.00 | 7.50 | 7.50 | 7.00 |
| Cycles executing div or sqrt instructions | NA |
| FE+BE cycles | 18.10 |
| Stall cycles | 0.00 |
| Front-end | 19.75 |
| Dispatch | 9.00 |
| Overall L1 | 19.75 |
| all | 9% |
| load | 16% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 11% |
| all | 13% |
| load | 18% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SUB $0x20,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| TEST %R9,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JLE 4e6680 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV (%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP $0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 4e66a0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 4e670e | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOVQ $0,0x40(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 |
| JMP 4e67c0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x3,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| MOV (%R8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| LEA 0x8(%R8),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| VMOVDQU 0x2c9e8(%RIP),%YMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x8,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 4e673c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV (%R8,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %RAX,0x40(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JE 4e67c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMP %R9,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JE 4e67c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV %RDI,-0x18(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,-0x8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV %R8,-0x10(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| CALL 4f3da0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
| MOV -0x10(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x8(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x18(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP $0x4,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 4e67e0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x4,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JB 4e67a8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV %RAX,0x38(%R8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOVQ $0,0x38(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| MOV $0x2,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 4e680d | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| Source file and lines | csr_matrix.c:136-168 |
| Module | exec |
| nb instructions | 72 |
| nb uops | 79 |
| loop length | 312 |
| used x86 registers | 11 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 1 |
| used zmm registers | 0 |
| nb stack references | 3 |
| micro-operation queue | 19.75 cycles |
| front end | 19.75 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | |
|---|---|---|---|---|---|---|---|---|
| uops | 7.50 | 7.50 | 7.00 | 7.00 | 9.00 | 7.50 | 7.50 | 7.00 |
| cycles | 7.50 | 7.50 | 7.00 | 7.00 | 9.00 | 7.50 | 7.50 | 7.00 |
| Cycles executing div or sqrt instructions | NA |
| FE+BE cycles | 18.10 |
| Stall cycles | 0.00 |
| Front-end | 19.75 |
| Dispatch | 9.00 |
| Overall L1 | 19.75 |
| all | 9% |
| load | 16% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 11% |
| all | 13% |
| load | 18% |
| store | 10% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|
| PUSH %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SUB $0x20,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV 0x10(%RDI),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| TEST %R9,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JLE 4e6680 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV (%RDI),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP $0x8,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 4e66a0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 4e670e | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOVQ $0,0x40(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 |
| JMP 4e67c0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%RSI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x3,%RSI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| MOV (%R8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| LEA 0x8(%R8),%RDX | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 1 | 0.50 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| VMOVDQU 0x2c9e8(%RIP),%YMM0 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 5 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x8,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%RDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 4e673c | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV (%R8,%RDX,8),%RCX | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| XCHG %AX,%AX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %RAX,0x40(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| TEST %RAX,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JE 4e67c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| CMP %R9,%RAX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JE 4e67c0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV $0x8,%ESI | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| MOV %RDI,-0x18(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV %RAX,%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,-0x8(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| MOV %R8,-0x10(%RBP) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| CALL 4f3da0 | 2 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 1 | 0.33 | 0 | 1 |
| MOV -0x10(%RBP),%RSI | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x8(%RBP),%R9 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| MOV -0x18(%RBP),%R8 | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 4-5 | 0.50 |
| CMP $0x4,%R9 | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JAE 4e67e0 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| AND $-0x4,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| CMP %R9,%RCX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| JB 4e67a8 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50-1 |
| MOV %RAX,0x38(%R8) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 3 | 1 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOVQ $0,0x38(%RDI) | 1 | 0 | 0 | 0.33 | 0.33 | 1 | 0 | 0 | 0.33 | 2 | 1 |
| XOR %EAX,%EAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| ADD $0x20,%RSP | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| POP %RBP | 1 | 0 | 0 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 2 | 0.50 |
| VZEROUPPER | 4 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 |
| RET | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 1 | 0.33 | 0 | 1 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| MOV %R9,%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| SHR $0x2,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 1 | 0.50 |
| MOV $0x2,%EDX | 1 | 0.25 | 0.25 | 0 | 0 | 0 | 0.25 | 0.25 | 0 | 1 | 0.25 |
| XOR %R10D,%R10D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| JMP 4e680d | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 1-2 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOPW %CS:(%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.25 |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ▼hypre_CSRMatrixSetRownnz– | 0.01 | 0 |
| ○Loop 3884 - csr_matrix.c:145-148 - exec | 0.01 | 0 |
| ○Loop 3886 - csr_matrix.c:161-164 - exec | 0 | 0 |
| ○Loop 3885 - csr_matrix.c:161-168 - exec | 0 | 0 |
| ○Loop 3887 - csr_matrix.c:145-148 - exec | 0 | 0 |
