| Loop Id: 111 | Module: exec | Source: PdV_kernel.f90:69-99 [...] | Coverage: 5.73% |
|---|
| Loop Id: 111 | Module: exec | Source: PdV_kernel.f90:69-99 [...] | Coverage: 5.73% |
|---|
0x423060 VMOVUPD -0x8(%R12,%RBX,8),%YMM3 [5] |
0x423067 VMOVUPD (%R12,%RBX,8),%YMM4 [5] |
0x42306d VADDPD -0x8(%RCX,%RBX,8),%YMM3,%YMM3 [2] |
0x423073 VMULPD -0x8(%RAX,%RBX,8),%YMM2,%YMM5 [11] |
0x423079 VADDPD (%RCX,%RBX,8),%YMM4,%YMM4 [2] |
0x42307e VMULPD (%RAX,%RBX,8),%YMM2,%YMM6 [11] |
0x423083 VMOVUPD (%R15,%RBX,8),%YMM7 [13] |
0x423089 VADDPD -0x8(%R15,%RBX,8),%YMM7,%YMM7 [13] |
0x423090 VMULPD (%R14,%RBX,8),%YMM2,%YMM8 [6] |
0x423096 VMULPD %YMM7,%YMM8,%YMM7 |
0x42309a VFMADD231PD %YMM5,%YMM3,%YMM7 |
0x42309f VFNMADD231PD %YMM6,%YMM4,%YMM7 |
0x4230a4 VMOVUPD (%R10,%RBX,8),%YMM3 [9] |
0x4230aa VADDPD -0x8(%R10,%RBX,8),%YMM3,%YMM3 [9] |
0x4230b1 VMULPD (%RDX,%RBX,8),%YMM2,%YMM4 [1] |
0x4230b6 VMOVUPD (%R13,%RBX,8),%YMM5 [4] |
0x4230bd VMOVUPD (%R9,%RBX,8),%YMM6 [14] |
0x4230c3 VFMSUB213PD %YMM7,%YMM3,%YMM4 |
0x4230c8 VADDPD (%RSI,%RBX,8),%YMM6,%YMM3 [7] |
0x4230cd VMULPD %YMM3,%YMM4,%YMM3 |
0x4230d1 VMULPD (%RDI,%RBX,8),%YMM5,%YMM6 [8] |
0x4230d6 VDIVPD %YMM6,%YMM3,%YMM3 |
0x4230da VMOVUPD (%R8,%RBX,8),%YMM7 [3] |
0x4230e0 VSUBPD %YMM3,%YMM7,%YMM3 |
0x4230e4 MOV -0x38(%RBP),%R11 [15] |
0x4230e8 VMOVUPD %YMM3,(%R11,%RBX,8) [10] |
0x4230ee VADDPD %YMM5,%YMM4,%YMM3 |
0x4230f2 VDIVPD %YMM3,%YMM6,%YMM3 |
0x4230f6 MOV -0x68(%RBP),%R11 [15] |
0x4230fa VMOVUPD %YMM3,(%R11,%RBX,8) [12] |
0x423100 ADD $0x4,%RBX |
0x423104 CMP -0x60(%RBP),%RBX [15] |
0x423108 JB 423060 |
/home/eoseret/qaas_runs_CPU_9468/171-152-3172/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 69 - 99 |
-------------------------------------------------------------------------------- |
69: IF(predict)THEN |
[...] |
75: DO j=x_min,x_max |
76: |
77: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
78: +xvel0(j ,k )+xvel0(j ,k+1)))*0.25_8*dt*0.5 |
79: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
80: +xvel0(j+1,k )+xvel0(j+1,k+1)))*0.25_8*dt*0.5 |
81: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
82: +yvel0(j ,k )+yvel0(j+1,k )))*0.25_8*dt*0.5 |
83: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
84: +yvel0(j ,k+1)+yvel0(j+1,k+1)))*0.25_8*dt*0.5 |
85: total_flux=right_flux-left_flux+top_flux-bottom_flux |
86: |
87: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
95: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
96: |
97: energy1(j,k)=energy0(j,k)-energy_change |
98: |
99: density1(j,k)=density0(j,k)*volume_change_s |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.88 |
| Bottlenecks | P0, |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source | PdV_kernel.f90:69-69,PdV_kernel.f90:75-87,PdV_kernel.f90:95-99 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 7.00 |
| DIV/SQRT cycles | 6.50 |
| P0 cycles | 8.50 |
| P1 cycles | 6.67 |
| P2 cycles | 6.67 |
| P3 cycles | 1.00 |
| P4 cycles | 6.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 0.00 |
| P10 cycles | 6.67 |
| P11 cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 16.44 - 16.46 |
| Stall cycles (UFS) | 8.78 - 8.79 |
| Nb insns | 33.00 |
| Nb uops | 32.00 |
| Nb loads | 20.00 |
| Nb stores | 2.00 |
| Nb stack references | 3.00 |
| FLOP/cycle | 5.50 |
| Nb FLOP add-sub | 28.00 |
| Nb FLOP mul | 28.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 39.50 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 568.00 |
| Bytes stored | 64.00 |
| Stride 0 | 1.00 |
| Stride 1 | 7.00 |
| Stride n | 6.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.88 |
| Bottlenecks | P0, |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source | PdV_kernel.f90:69-69,PdV_kernel.f90:75-87,PdV_kernel.f90:95-99 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 7.00 |
| DIV/SQRT cycles | 6.50 |
| P0 cycles | 8.50 |
| P1 cycles | 6.67 |
| P2 cycles | 6.67 |
| P3 cycles | 1.00 |
| P4 cycles | 6.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 0.00 |
| P10 cycles | 6.67 |
| P11 cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 16.44 - 16.46 |
| Stall cycles (UFS) | 8.78 - 8.79 |
| Nb insns | 33.00 |
| Nb uops | 32.00 |
| Nb loads | 20.00 |
| Nb stores | 2.00 |
| Nb stack references | 3.00 |
| FLOP/cycle | 5.50 |
| Nb FLOP add-sub | 28.00 |
| Nb FLOP mul | 28.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 39.50 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 568.00 |
| Bytes stored | 64.00 |
| Stride 0 | 1.00 |
| Stride 1 | 7.00 |
| Stride n | 6.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source file and lines | PdV_kernel.f90:69-99 |
| Module | exec |
| nb instructions | 33 |
| nb uops | 32 |
| loop length | 174 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 7 |
| used zmm registers | 0 |
| nb stack references | 3 |
| ADD-SUB / MUL ratio | 1.00 |
| micro-operation queue | 7.00 cycles |
| front end | 7.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 6.50 | 6.50 | 6.67 | 6.67 | 1.00 | 6.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
| cycles | 6.50 | 8.50 | 6.67 | 6.67 | 1.00 | 6.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 16.44-16.46 |
| Stall cycles | 8.77-8.79 |
| LB full (events) | 9.75-9.77 |
| Front-end | 7.00 |
| Dispatch | 8.50 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | 50% |
| fma | 50% |
| div/sqrt | 50% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%R12,%RBX,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD (%R12,%RBX,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%RCX,%RBX,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD -0x8(%RAX,%RBX,8),%YMM2,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VADDPD (%RCX,%RBX,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%RAX,%RBX,8),%YMM2,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%R15,%RBX,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%R15,%RBX,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%R14,%RBX,8),%YMM2,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMULPD %YMM7,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFNMADD231PD %YMM6,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVUPD (%R10,%RBX,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%R10,%RBX,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%RDX,%RBX,8),%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%R13,%RBX,8),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD (%R9,%RBX,8),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VFMSUB213PD %YMM7,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VADDPD (%RSI,%RBX,8),%YMM6,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD %YMM3,%YMM4,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMULPD (%RDI,%RBX,8),%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VDIVPD %YMM6,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| VMOVUPD (%R8,%RBX,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VSUBPD %YMM3,%YMM7,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%R11,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VADDPD %YMM5,%YMM4,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VDIVPD %YMM3,%YMM6,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| MOV -0x68(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%R11,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP -0x60(%RBP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
| JB 423060 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source file and lines | PdV_kernel.f90:69-99 |
| Module | exec |
| nb instructions | 33 |
| nb uops | 32 |
| loop length | 174 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 7 |
| used zmm registers | 0 |
| nb stack references | 3 |
| ADD-SUB / MUL ratio | 1.00 |
| micro-operation queue | 7.00 cycles |
| front end | 7.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 6.50 | 6.50 | 6.67 | 6.67 | 1.00 | 6.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
| cycles | 6.50 | 8.50 | 6.67 | 6.67 | 1.00 | 6.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 6.67 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 16.44-16.46 |
| Stall cycles | 8.77-8.79 |
| LB full (events) | 9.75-9.77 |
| Front-end | 7.00 |
| Dispatch | 8.50 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | 50% |
| fma | 50% |
| div/sqrt | 50% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%R12,%RBX,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD (%R12,%RBX,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%RCX,%RBX,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD -0x8(%RAX,%RBX,8),%YMM2,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VADDPD (%RCX,%RBX,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%RAX,%RBX,8),%YMM2,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%R15,%RBX,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%R15,%RBX,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%R14,%RBX,8),%YMM2,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMULPD %YMM7,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFNMADD231PD %YMM6,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVUPD (%R10,%RBX,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%R10,%RBX,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%RDX,%RBX,8),%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%R13,%RBX,8),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD (%R9,%RBX,8),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VFMSUB213PD %YMM7,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VADDPD (%RSI,%RBX,8),%YMM6,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD %YMM3,%YMM4,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMULPD (%RDI,%RBX,8),%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VDIVPD %YMM6,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| VMOVUPD (%R8,%RBX,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VSUBPD %YMM3,%YMM7,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| MOV -0x38(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%R11,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VADDPD %YMM5,%YMM4,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VDIVPD %YMM3,%YMM6,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| MOV -0x68(%RBP),%R11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%R11,%RBX,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP -0x60(%RBP),%RBX | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
| JB 423060 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x1200> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
