| Loop Id: 114 | Module: exec | Source: PdV_kernel.f90:111-135 [...] | Coverage: 6.69% |
|---|
| Loop Id: 114 | Module: exec | Source: PdV_kernel.f90:111-135 [...] | Coverage: 6.69% |
|---|
0x422650 VMOVUPD -0x8(%RDX,%R13,8),%YMM3 [2] |
0x422657 VMOVUPD (%RDX,%R13,8),%YMM4 [2] |
0x42265d VADDPD -0x8(%RAX,%R13,8),%YMM3,%YMM3 [19] |
0x422664 VADDPD -0x8(%R8,%R13,8),%YMM3,%YMM3 [8] |
0x42266b VADDPD -0x8(%R15,%R13,8),%YMM3,%YMM3 [1] |
0x422672 VMULPD -0x8(%R10,%R13,8),%YMM2,%YMM5 [14] |
0x422679 VADDPD (%RAX,%R13,8),%YMM4,%YMM4 [19] |
0x42267f VADDPD (%R8,%R13,8),%YMM4,%YMM4 [8] |
0x422685 VADDPD (%R15,%R13,8),%YMM4,%YMM4 [1] |
0x42268b VMULPD (%R10,%R13,8),%YMM2,%YMM6 [14] |
0x422691 VMOVUPD (%RCX,%R13,8),%YMM7 [17] |
0x422697 VADDPD -0x8(%RCX,%R13,8),%YMM7,%YMM7 [17] |
0x42269e VADDPD -0x8(%R12,%R13,8),%YMM7,%YMM7 [5] |
0x4226a5 VADDPD (%R12,%R13,8),%YMM7,%YMM7 [5] |
0x4226ab VMULPD (%R11,%R13,8),%YMM2,%YMM8 [11] |
0x4226b1 VMULPD %YMM7,%YMM8,%YMM7 |
0x4226b5 VFMADD231PD %YMM5,%YMM3,%YMM7 |
0x4226ba VFNMADD231PD %YMM6,%YMM4,%YMM7 |
0x4226bf VMOVUPD (%R9,%R13,8),%YMM3 [7] |
0x4226c5 VADDPD -0x8(%R9,%R13,8),%YMM3,%YMM3 [7] |
0x4226cc VADDPD -0x8(%RSI,%R13,8),%YMM3,%YMM3 [4] |
0x4226d3 VADDPD (%RSI,%R13,8),%YMM3,%YMM3 [4] |
0x4226d9 VMULPD (%RBX,%R13,8),%YMM2,%YMM4 [15] |
0x4226df VMOVUPD (%R14,%R13,8),%YMM5 [18] |
0x4226e5 MOV -0x38(%RBP),%RDI [13] |
0x4226e9 VMOVUPD (%RDI,%R13,8),%YMM6 [6] |
0x4226ef VFMSUB213PD %YMM7,%YMM3,%YMM4 |
0x4226f4 MOV -0x68(%RBP),%RDI [13] |
0x4226f8 VADDPD (%RDI,%R13,8),%YMM6,%YMM3 [9] |
0x4226fe VMULPD %YMM3,%YMM4,%YMM3 |
0x422702 MOV -0x60(%RBP),%RDI [13] |
0x422706 VMULPD (%RDI,%R13,8),%YMM5,%YMM6 [16] |
0x42270c VDIVPD %YMM6,%YMM3,%YMM3 |
0x422710 MOV -0x70(%RBP),%RDI [13] |
0x422714 VMOVUPD (%RDI,%R13,8),%YMM7 [12] |
0x42271a VSUBPD %YMM3,%YMM7,%YMM3 |
0x42271e MOV -0x48(%RBP),%RDI [13] |
0x422722 VMOVUPD %YMM3,(%RDI,%R13,8) [10] |
0x422728 VADDPD %YMM5,%YMM4,%YMM3 |
0x42272c VDIVPD %YMM3,%YMM6,%YMM3 |
0x422730 MOV -0x30(%RBP),%RDI [13] |
0x422734 VMOVUPD %YMM3,(%RDI,%R13,8) [3] |
0x42273a ADD $0x4,%R13 |
0x42273e CMP -0x90(%RBP),%R13 [13] |
0x422745 JB 422650 |
/scratch_na/users/xoserete/qaas_runs/171-415-7919/intel/CloverLeafFC/build/CloverLeafFC/CloverLeaf_ref/kernels/PdV_kernel.f90: 111 - 135 |
-------------------------------------------------------------------------------- |
111: DO j=x_min,x_max |
112: |
113: left_flux= (xarea(j ,k )*(xvel0(j ,k )+xvel0(j ,k+1) & |
114: +xvel1(j ,k )+xvel1(j ,k+1)))*0.25_8*dt |
115: right_flux= (xarea(j+1,k )*(xvel0(j+1,k )+xvel0(j+1,k+1) & |
116: +xvel1(j+1,k )+xvel1(j+1,k+1)))*0.25_8*dt |
117: bottom_flux=(yarea(j ,k )*(yvel0(j ,k )+yvel0(j+1,k ) & |
118: +yvel1(j ,k )+yvel1(j+1,k )))*0.25_8*dt |
119: top_flux= (yarea(j ,k+1)*(yvel0(j ,k+1)+yvel0(j+1,k+1) & |
120: +yvel1(j ,k+1)+yvel1(j+1,k+1)))*0.25_8*dt |
121: total_flux=right_flux-left_flux+top_flux-bottom_flux |
122: |
123: volume_change_s=volume(j,k)/(volume(j,k)+total_flux) |
[...] |
131: energy_change=(pressure(j,k)/density0(j,k)+viscosity(j,k)/density0(j,k))*total_flux*recip_volume |
132: |
133: energy1(j,k)=energy0(j,k)-energy_change |
134: |
135: density1(j,k)=density0(j,k)*volume_change_s |
| Coverage (%) | Name | Source Location | Module |
|---|---|---|---|
| ►100.00+ | __kmp_invoke_microtask | libiomp5.so | |
| ○ | __kmp_invoke_task_func | libiomp5.so |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.28 |
| Bottlenecks | P0, |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source | PdV_kernel.f90:111-123,PdV_kernel.f90:131-135 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 10.33 |
| DIV/SQRT cycles | 9.00 |
| P0 cycles | 12.50 |
| P1 cycles | 10.67 |
| P2 cycles | 10.67 |
| P3 cycles | 1.00 |
| P4 cycles | 9.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 0.00 |
| P10 cycles | 10.67 |
| P11 cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 16.49 - 16.51 |
| Stall cycles (UFS) | 5.54 - 5.56 |
| Nb insns | 45.00 |
| Nb uops | 44.00 |
| Nb loads | 32.00 |
| Nb stores | 2.00 |
| Nb stack references | 7.00 |
| FLOP/cycle | 7.50 |
| Nb FLOP add-sub | 60.00 |
| Nb FLOP mul | 28.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 57.50 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 856.00 |
| Bytes stored | 64.00 |
| Stride 0 | 1.00 |
| Stride 1 | 3.00 |
| Stride n | 9.00 |
| Stride unknown | 1.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 1.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.28 |
| Bottlenecks | P0, |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source | PdV_kernel.f90:111-123,PdV_kernel.f90:131-135 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 16.00 |
| CQA cycles if no scalar integer | 16.00 |
| CQA cycles if FP arith vectorized | 16.00 |
| CQA cycles if fully vectorized | 16.00 |
| Front-end cycles | 10.33 |
| DIV/SQRT cycles | 9.00 |
| P0 cycles | 12.50 |
| P1 cycles | 10.67 |
| P2 cycles | 10.67 |
| P3 cycles | 1.00 |
| P4 cycles | 9.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 0.00 |
| P10 cycles | 10.67 |
| P11 cycles | 16.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 16.49 - 16.51 |
| Stall cycles (UFS) | 5.54 - 5.56 |
| Nb insns | 45.00 |
| Nb uops | 44.00 |
| Nb loads | 32.00 |
| Nb stores | 2.00 |
| Nb stack references | 7.00 |
| FLOP/cycle | 7.50 |
| Nb FLOP add-sub | 60.00 |
| Nb FLOP mul | 28.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 8.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 57.50 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 856.00 |
| Bytes stored | 64.00 |
| Stride 0 | 1.00 |
| Stride 1 | 3.00 |
| Stride n | 9.00 |
| Stride unknown | 1.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source file and lines | PdV_kernel.f90:111-135 |
| Module | exec |
| nb instructions | 45 |
| nb uops | 44 |
| loop length | 251 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 7 |
| used zmm registers | 0 |
| nb stack references | 7 |
| ADD-SUB / MUL ratio | 2.14 |
| micro-operation queue | 10.33 cycles |
| front end | 10.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 9.00 | 9.00 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| cycles | 9.00 | 12.50 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 16.49-16.51 |
| Stall cycles | 5.54-5.56 |
| LB full (events) | 6.77-6.81 |
| LM full (events) | 0.18-0.17 |
| Front-end | 10.33 |
| Dispatch | 12.50 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | 50% |
| fma | 50% |
| div/sqrt | 50% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%RDX,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD (%RDX,%R13,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%RAX,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%R8,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%R15,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD -0x8(%R10,%R13,8),%YMM2,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VADDPD (%RAX,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%R8,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%R15,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%R10,%R13,8),%YMM2,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%RCX,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%RCX,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%R11,%R13,8),%YMM2,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMULPD %YMM7,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFNMADD231PD %YMM6,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVUPD (%R9,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%R9,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%RBX,%R13,8),%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%R14,%R13,8),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD (%RDI,%R13,8),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VFMSUB213PD %YMM7,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VADDPD (%RDI,%R13,8),%YMM6,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD %YMM3,%YMM4,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMULPD (%RDI,%R13,8),%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VDIVPD %YMM6,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD (%RDI,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VSUBPD %YMM3,%YMM7,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VADDPD %YMM5,%YMM4,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VDIVPD %YMM3,%YMM6,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x4,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP -0x90(%RBP),%R13 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
| JB 422650 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x870> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | pdv_kernel_.DIR.OMP.PARALLEL.2 |
| Source file and lines | PdV_kernel.f90:111-135 |
| Module | exec |
| nb instructions | 45 |
| nb uops | 44 |
| loop length | 251 |
| used x86 registers | 15 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 7 |
| used zmm registers | 0 |
| nb stack references | 7 |
| ADD-SUB / MUL ratio | 2.14 |
| micro-operation queue | 10.33 cycles |
| front end | 10.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 9.00 | 9.00 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| cycles | 9.00 | 12.50 | 10.67 | 10.67 | 1.00 | 9.00 | 1.00 | 1.00 | 1.00 | 1.00 | 0.00 | 10.67 |
| Cycles executing div or sqrt instructions | 16.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 16.49-16.51 |
| Stall cycles | 5.54-5.56 |
| LB full (events) | 6.77-6.81 |
| LM full (events) | 0.18-0.17 |
| Front-end | 10.33 |
| Dispatch | 12.50 |
| DIV/SQRT | 16.00 |
| Data deps. | 1.00 |
| Overall L1 | 16.00 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | 100% |
| fma | 100% |
| div/sqrt | 100% |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | 50% |
| fma | 50% |
| div/sqrt | 50% |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMOVUPD -0x8(%RDX,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD (%RDX,%R13,8),%YMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%RAX,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%R8,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%R15,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD -0x8(%R10,%R13,8),%YMM2,%YMM5 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VADDPD (%RAX,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%R8,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%R15,%R13,8),%YMM4,%YMM4 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%R10,%R13,8),%YMM2,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%RCX,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%RCX,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%R12,%R13,8),%YMM7,%YMM7 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%R11,%R13,8),%YMM2,%YMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMULPD %YMM7,%YMM8,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM5,%YMM3,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFNMADD231PD %YMM6,%YMM4,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVUPD (%R9,%R13,8),%YMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VADDPD -0x8(%R9,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD -0x8(%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VADDPD (%RSI,%R13,8),%YMM3,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD (%RBX,%R13,8),%YMM2,%YMM4 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD (%R14,%R13,8),%YMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| MOV -0x38(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD (%RDI,%R13,8),%YMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VFMSUB213PD %YMM7,%YMM3,%YMM4 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| MOV -0x68(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VADDPD (%RDI,%R13,8),%YMM6,%YMM3 | 1 | 0 | 0.50 | 0.33 | 0.33 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.50 |
| VMULPD %YMM3,%YMM4,%YMM3 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| MOV -0x60(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMULPD (%RDI,%R13,8),%YMM5,%YMM6 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VDIVPD %YMM6,%YMM3,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| MOV -0x70(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD (%RDI,%R13,8),%YMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VSUBPD %YMM3,%YMM7,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| MOV -0x48(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VADDPD %YMM5,%YMM4,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VDIVPD %YMM3,%YMM6,%YMM3 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| MOV -0x30(%RBP),%RDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVUPD %YMM3,(%RDI,%R13,8) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x4,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP -0x90(%RBP),%R13 | 1 | 0.20 | 0.20 | 0.33 | 0.33 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.33 | 1 | 0.33 |
| JB 422650 <pdv_kernel_module_mp_pdv_kernel_.DIR.OMP.PARALLEL.2+0x870> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
