| Loop Id: 99 | Module: exec | Source: timestep.c:88-94 | Coverage: 1.4% |
|---|
| Loop Id: 99 | Module: exec | Source: timestep.c:88-94 | Coverage: 1.4% |
|---|
0x40f4c0 VPMOVSXDQ (%R12,%RBX,4),%YMM7 [2] |
0x40f4c6 KXNORW %K0,%K0,%K1 |
0x40f4ca VXORPD %XMM8,%XMM8,%XMM8 |
0x40f4cf VPSLLQ $0x4,%YMM7,%YMM7 |
0x40f4d4 VGATHERQPD 0x8(%R9,%YMM7,1),%YMM8{%K1} [3] |
0x40f4dc VDIVPD %YMM8,%YMM1,%YMM7 |
0x40f4e1 VMOVUPD 0x20(%R11,%R13,1),%YMM8 [1] |
0x40f4e8 VMOVUPD 0x20(%R10,%R13,1),%YMM9 [4] |
0x40f4ef VMOVUPD 0x10(%R11,%R13,1),%XMM10 [1] |
0x40f4f6 VMOVUPD 0x10(%R10,%R13,1),%XMM11 [4] |
0x40f4fd VBLENDPD $0x3,(%R11,%R13,1),%YMM8,%YMM12 [1] |
0x40f504 VBLENDPD $0x3,(%R10,%R13,1),%YMM9,%YMM13 [4] |
0x40f50b VINSERTF128 $0x1,0x40(%R11,%R13,1),%YMM10,%YMM10 [1] |
0x40f513 VINSERTF128 $0x1,0x40(%R10,%R13,1),%YMM11,%YMM11 [4] |
0x40f51b VBROADCASTSD 0x50(%R11,%R13,1),%YMM14 [1] |
0x40f522 VBROADCASTSD 0x50(%R10,%R13,1),%YMM15 [4] |
0x40f529 VSHUFPD $0x5,%YMM8,%YMM12,%YMM8 |
0x40f52f VBLENDPD $0x8,%YMM14,%YMM8,%YMM8 |
0x40f535 VMOVUPD 0x20(%R11,%R13,1),%XMM14 [1] |
0x40f53c VSHUFPD $0x5,%YMM9,%YMM13,%YMM9 |
0x40f542 VBLENDPD $0x8,%YMM15,%YMM9,%YMM9 |
0x40f548 VMOVUPD 0x20(%R10,%R13,1),%XMM15 [4] |
0x40f54f VBLENDPD $0xc,0x40(%R11,%R13,1),%YMM14,%YMM14 [1] |
0x40f557 VBLENDPD $0xc,0x40(%R10,%R13,1),%YMM15,%YMM15 [4] |
0x40f55f VBLENDPD $0xa,%YMM10,%YMM12,%YMM12 |
0x40f565 VBLENDPD $0xa,%YMM11,%YMM13,%YMM13 |
0x40f56b VFMADD231PD %YMM12,%YMM7,%YMM13 |
0x40f570 VFMADD231PD %YMM8,%YMM7,%YMM9 |
0x40f575 VBLENDPD $0xa,%YMM14,%YMM10,%YMM8 |
0x40f57b VBLENDPD $0xa,%YMM15,%YMM11,%YMM10 |
0x40f581 VFMADD231PD %YMM8,%YMM7,%YMM10 |
0x40f586 VMOVAPD %YMM9,%YMM7 |
0x40f58a VPERMT2PD %YMM13,%YMM2,%YMM7 |
0x40f590 VMOVAPD %YMM13,%YMM8 |
0x40f595 VPERMT2PD %YMM9,%YMM3,%YMM8 |
0x40f59b VPERMT2PD %YMM13,%YMM4,%YMM9 |
0x40f5a1 VPERMT2PD %YMM10,%YMM6,%YMM8 |
0x40f5a7 VBLENDPD $0x2,%YMM10,%YMM7,%YMM7 |
0x40f5ad VMOVUPD %YMM7,0x20(%R10,%R13,1) [4] |
0x40f5b4 VMOVUPD %YMM8,(%R10,%R13,1) [4] |
0x40f5ba VPERMT2PD %YMM9,%YMM5,%YMM10 |
0x40f5c0 VMOVUPD %YMM10,0x40(%R10,%R13,1) [4] |
0x40f5c7 ADD $0x4,%RBX |
0x40f5cb ADD $0x60,%R13 |
0x40f5cf CMP %EDX,%EBX |
0x40f5d1 JLE 40f4c0 |
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88 - 94 |
-------------------------------------------------------------------------------- |
88: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
89: { |
90: int iSpecies = s->atoms->iSpecies[iOff]; |
91: real_t invMass = 1.0/s->species[iSpecies].mass; |
92: s->atoms->r[iOff][0] += dt*s->atoms->p[iOff][0]*invMass; |
93: s->atoms->r[iOff][1] += dt*s->atoms->p[iOff][1]*invMass; |
94: s->atoms->r[iOff][2] += dt*s->atoms->p[iOff][2]*invMass; |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.05 |
| CQA speedup if FP arith vectorized | 1.09 |
| CQA speedup if fully vectorized | 1.27 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P0, |
| Function | advancePosition.extracted |
| Source | timestep.c:88-94 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 10.17 |
| CQA cycles if no scalar integer | 9.67 |
| CQA cycles if FP arith vectorized | 9.33 |
| CQA cycles if fully vectorized | 8.00 |
| Front-end cycles | 9.33 |
| DIV/SQRT cycles | 10.17 |
| P0 cycles | 9.83 |
| P1 cycles | 6.33 |
| P2 cycles | 6.33 |
| P3 cycles | 1.50 |
| P4 cycles | 10.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.50 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 0.00 |
| P10 cycles | 6.33 |
| P11 cycles | 8.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 27.25 - 113.27 |
| Stall cycles (UFS) | 17.45 - 103.47 |
| Nb insns | 46.00 |
| Nb uops | 56.00 |
| Nb loads | 16.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.75 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 4.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 44.07 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 352.00 |
| Bytes stored | 96.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 1.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 95.12 |
| Vectorization ratio load | 87.50 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 92.59 |
| Vector-efficiency ratio all | 43.29 |
| Vector-efficiency ratio load | 34.38 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | 44.44 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.05 |
| CQA speedup if FP arith vectorized | 1.09 |
| CQA speedup if fully vectorized | 1.27 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P0, |
| Function | advancePosition.extracted |
| Source | timestep.c:88-94 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 10.17 |
| CQA cycles if no scalar integer | 9.67 |
| CQA cycles if FP arith vectorized | 9.33 |
| CQA cycles if fully vectorized | 8.00 |
| Front-end cycles | 9.33 |
| DIV/SQRT cycles | 10.17 |
| P0 cycles | 9.83 |
| P1 cycles | 6.33 |
| P2 cycles | 6.33 |
| P3 cycles | 1.50 |
| P4 cycles | 10.00 |
| P5 cycles | 1.00 |
| P6 cycles | 1.50 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 0.00 |
| P10 cycles | 6.33 |
| P11 cycles | 8.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 27.25 - 113.27 |
| Stall cycles (UFS) | 17.45 - 103.47 |
| Nb insns | 46.00 |
| Nb uops | 56.00 |
| Nb loads | 16.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 2.75 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 4.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 44.07 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 352.00 |
| Bytes stored | 96.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 1.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 95.12 |
| Vectorization ratio load | 87.50 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | 100.00 |
| Vectorization ratio other | 92.59 |
| Vector-efficiency ratio all | 43.29 |
| Vector-efficiency ratio load | 34.38 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | 50.00 |
| Vector-efficiency ratio other | 44.44 |
| Path / |
| Function | advancePosition.extracted |
| Source file and lines | timestep.c:88-94 |
| Module | exec |
| nb instructions | 46 |
| nb uops | 56 |
| loop length | 279 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 5 |
| used ymm registers | 15 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 9.33 cycles |
| front end | 9.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 10.17 | 9.83 | 6.33 | 6.33 | 1.50 | 10.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 6.33 |
| cycles | 10.17 | 9.83 | 6.33 | 6.33 | 1.50 | 10.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 6.33 |
| Cycles executing div or sqrt instructions | 8.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 27.25-113.27 |
| Stall cycles | 17.45-103.47 |
| PRF_FLOAT full (events) | 19.39-106.47 |
| Front-end | 9.33 |
| Dispatch | 10.17 |
| DIV/SQRT | 8.00 |
| Data deps. | 1.00 |
| Overall L1 | 10.17 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 94% |
| load | 86% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | 100% |
| other | 92% |
| all | 95% |
| load | 87% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | 100% |
| other | 92% |
| all | 37% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 50% |
| all | 43% |
| load | 35% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | 50% |
| other | 44% |
| all | 43% |
| load | 34% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | 50% |
| other | 44% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VPMOVSXDQ (%R12,%RBX,4),%YMM7 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
| KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| VPSLLQ $0x4,%YMM7,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
| VGATHERQPD 0x8(%R9,%YMM7,1),%YMM8{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
| VDIVPD %YMM8,%YMM1,%YMM7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| VMOVUPD 0x20(%R11,%R13,1),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD 0x20(%R10,%R13,1),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD 0x10(%R11,%R13,1),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD 0x10(%R10,%R13,1),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0x3,(%R11,%R13,1),%YMM8,%YMM12 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBLENDPD $0x3,(%R10,%R13,1),%YMM9,%YMM13 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VINSERTF128 $0x1,0x40(%R11,%R13,1),%YMM10,%YMM10 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VINSERTF128 $0x1,0x40(%R10,%R13,1),%YMM11,%YMM11 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBROADCASTSD 0x50(%R11,%R13,1),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBROADCASTSD 0x50(%R10,%R13,1),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VSHUFPD $0x5,%YMM8,%YMM12,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| VBLENDPD $0x8,%YMM14,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPD 0x20(%R11,%R13,1),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VSHUFPD $0x5,%YMM9,%YMM13,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| VBLENDPD $0x8,%YMM15,%YMM9,%YMM9 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPD 0x20(%R10,%R13,1),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0xc,0x40(%R11,%R13,1),%YMM14,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBLENDPD $0xc,0x40(%R10,%R13,1),%YMM15,%YMM15 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBLENDPD $0xa,%YMM10,%YMM12,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBLENDPD $0xa,%YMM11,%YMM13,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM12,%YMM7,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM8,%YMM7,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VBLENDPD $0xa,%YMM14,%YMM10,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBLENDPD $0xa,%YMM15,%YMM11,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM8,%YMM7,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVAPD %YMM9,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM13,%YMM2,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVAPD %YMM13,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM9,%YMM3,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM13,%YMM4,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM10,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VBLENDPD $0x2,%YMM10,%YMM7,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPD %YMM7,0x20(%R10,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPD %YMM8,(%R10,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VPERMT2PD %YMM9,%YMM5,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVUPD %YMM10,0x40(%R10,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x60,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JLE 40f4c0 <advancePosition.extracted+0x210> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | advancePosition.extracted |
| Source file and lines | timestep.c:88-94 |
| Module | exec |
| nb instructions | 46 |
| nb uops | 56 |
| loop length | 279 |
| used x86 registers | 7 |
| used mmx registers | 0 |
| used xmm registers | 5 |
| used ymm registers | 15 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 9.33 cycles |
| front end | 9.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 10.17 | 9.83 | 6.33 | 6.33 | 1.50 | 10.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 6.33 |
| cycles | 10.17 | 9.83 | 6.33 | 6.33 | 1.50 | 10.00 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 6.33 |
| Cycles executing div or sqrt instructions | 8.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 27.25-113.27 |
| Stall cycles | 17.45-103.47 |
| PRF_FLOAT full (events) | 19.39-106.47 |
| Front-end | 9.33 |
| Dispatch | 10.17 |
| DIV/SQRT | 8.00 |
| Data deps. | 1.00 |
| Overall L1 | 10.17 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 94% |
| load | 86% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | 100% |
| other | 92% |
| all | 95% |
| load | 87% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | 100% |
| other | 92% |
| all | 37% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 50% |
| all | 43% |
| load | 35% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | 50% |
| other | 44% |
| all | 43% |
| load | 34% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | 50% |
| other | 44% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VPMOVSXDQ (%R12,%RBX,4),%YMM7 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
| KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| VXORPD %XMM8,%XMM8,%XMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| VPSLLQ $0x4,%YMM7,%YMM7 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
| VGATHERQPD 0x8(%R9,%YMM7,1),%YMM8{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
| VDIVPD %YMM8,%YMM1,%YMM7 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 13-15 | 8 |
| VMOVUPD 0x20(%R11,%R13,1),%YMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD 0x20(%R10,%R13,1),%YMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD 0x10(%R11,%R13,1),%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPD 0x10(%R10,%R13,1),%XMM11 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0x3,(%R11,%R13,1),%YMM8,%YMM12 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBLENDPD $0x3,(%R10,%R13,1),%YMM9,%YMM13 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VINSERTF128 $0x1,0x40(%R11,%R13,1),%YMM10,%YMM10 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VINSERTF128 $0x1,0x40(%R10,%R13,1),%YMM11,%YMM11 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBROADCASTSD 0x50(%R11,%R13,1),%YMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBROADCASTSD 0x50(%R10,%R13,1),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VSHUFPD $0x5,%YMM8,%YMM12,%YMM8 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| VBLENDPD $0x8,%YMM14,%YMM8,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPD 0x20(%R11,%R13,1),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VSHUFPD $0x5,%YMM9,%YMM13,%YMM9 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| VBLENDPD $0x8,%YMM15,%YMM9,%YMM9 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPD 0x20(%R10,%R13,1),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0xc,0x40(%R11,%R13,1),%YMM14,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBLENDPD $0xc,0x40(%R10,%R13,1),%YMM15,%YMM15 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBLENDPD $0xa,%YMM10,%YMM12,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBLENDPD $0xa,%YMM11,%YMM13,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM12,%YMM7,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM8,%YMM7,%YMM9 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VBLENDPD $0xa,%YMM14,%YMM10,%YMM8 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBLENDPD $0xa,%YMM15,%YMM11,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM8,%YMM7,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVAPD %YMM9,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM13,%YMM2,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVAPD %YMM13,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM9,%YMM3,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM13,%YMM4,%YMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM10,%YMM6,%YMM8 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VBLENDPD $0x2,%YMM10,%YMM7,%YMM7 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPD %YMM7,0x20(%R10,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPD %YMM8,(%R10,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VPERMT2PD %YMM9,%YMM5,%YMM10 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVUPD %YMM10,0x40(%R10,%R13,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x60,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JLE 40f4c0 <advancePosition.extracted+0x210> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
