| Function: kineticEnergy._omp_fn.0 | Module: exec | Source: timestep.c:107-116 | Coverage: 0.14% |
|---|
| Function: kineticEnergy._omp_fn.0 | Module: exec | Source: timestep.c:107-116 | Coverage: 0.14% |
|---|
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 107 - 116 |
-------------------------------------------------------------------------------- |
107: #pragma omp parallel for reduction(+:kenergy) |
108: for (int iBox=0; iBox<s->boxes->nLocalBoxes; iBox++) |
109: { |
110: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
111: { |
112: int iSpecies = s->atoms->iSpecies[iOff]; |
113: real_t invMass = 0.5/s->species[iSpecies].mass; |
114: kenergy += ( s->atoms->p[iOff][0] * s->atoms->p[iOff][0] + |
115: s->atoms->p[iOff][1] * s->atoms->p[iOff][1] + |
116: s->atoms->p[iOff][2] * s->atoms->p[iOff][2] )*invMass; |
0x4065b0 PUSH %RBP |
0x4065b1 MOV %RSP,%RBP |
0x4065b4 PUSH %R14 |
0x4065b6 PUSH %R13 |
0x4065b8 PUSH %R12 |
0x4065ba MOV %RDI,%R12 |
0x4065bd PUSH %RBX |
0x4065be MOV (%RDI),%RBX |
0x4065c1 CALL 403060 <omp_get_num_threads@plt> |
0x4065c6 MOV 0x18(%RBX),%R14 |
0x4065ca MOV %EAX,%R13D |
0x4065cd CALL 403150 <omp_get_thread_num@plt> |
0x4065d2 MOV %EAX,%R8D |
0x4065d5 MOV 0xc(%R14),%EAX |
0x4065d9 CLTD |
0x4065da IDIV %R13D |
0x4065dd CMP %EDX,%R8D |
0x4065e0 JL 406840 |
0x4065e6 IMUL %EAX,%R8D |
0x4065ea VXORPD %XMM0,%XMM0,%XMM0 |
0x4065ee ADD %EDX,%R8D |
0x4065f1 ADD %R8D,%EAX |
0x4065f4 CMP %EAX,%R8D |
0x4065f7 JGE 406818 |
0x4065fd MOVSXD %R8D,%R9 |
0x406600 MOV 0x78(%R14),%R13 |
0x406604 VMOVSD 0xb5ec(%RIP),%XMM3 |
0x40660c SAL $0x6,%R8D |
0x406610 LEA (%R9,%R9,2),%R11 |
0x406614 SAL $0x9,%R11 |
0x406618 NOPL (%RAX,%RAX,1) |
(27) 0x406620 MOVSXD (%R13,%R9,4),%RSI |
(27) 0x406625 TEST %ESI,%ESI |
(27) 0x406627 JLE 406801 |
(27) 0x40662d MOV 0x20(%RBX),%R10 |
(27) 0x406631 MOVSXD %R8D,%RCX |
(27) 0x406634 MOV 0x28(%RBX),%RDI |
(27) 0x406638 MOV 0x10(%R10),%R14 |
(27) 0x40663c MOV 0x20(%R10),%RDX |
(27) 0x406640 MOV %R9,%R10 |
(27) 0x406643 SAL $0x6,%R10 |
(27) 0x406647 ADD %RSI,%R10 |
(27) 0x40664a LEA (%R14,%RCX,4),%RCX |
(27) 0x40664e ADD %R11,%RDX |
(27) 0x406651 LEA (%R14,%R10,4),%R14 |
(27) 0x406655 MOV %R14,%RSI |
(27) 0x406658 SUB %RCX,%RSI |
(27) 0x40665b SUB $0x4,%RSI |
(27) 0x40665f SHR $0x2,%RSI |
(27) 0x406663 INC %RSI |
(27) 0x406666 AND $0x3,%ESI |
(27) 0x406669 JE 40672d |
(27) 0x40666f CMP $0x1,%RSI |
(27) 0x406673 JE 4066eb |
(27) 0x406675 CMP $0x2,%RSI |
(27) 0x406679 JE 4066b3 |
(27) 0x40667b VMOVSD 0x8(%RDX),%XMM2 |
(27) 0x406680 VMOVSD (%RDX),%XMM1 |
(27) 0x406684 ADD $0x4,%RCX |
(27) 0x406688 ADD $0x18,%RDX |
(27) 0x40668c VMOVSD -0x8(%RDX),%XMM5 |
(27) 0x406691 MOVSXD -0x4(%RCX),%R10 |
(27) 0x406695 VMULSD %XMM2,%XMM2,%XMM4 |
(27) 0x406699 SAL $0x4,%R10 |
(27) 0x40669d VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM6 |
(27) 0x4066a4 VFMADD231SD %XMM1,%XMM1,%XMM4 |
(27) 0x4066a9 VFMADD132SD %XMM5,%XMM4,%XMM5 |
(27) 0x4066ae VFMADD231SD %XMM5,%XMM6,%XMM0 |
(27) 0x4066b3 VMOVSD 0x8(%RDX),%XMM8 |
(27) 0x4066b8 VMOVSD (%RDX),%XMM7 |
(27) 0x4066bc ADD $0x4,%RCX |
(27) 0x4066c0 ADD $0x18,%RDX |
(27) 0x4066c4 VMOVSD -0x8(%RDX),%XMM10 |
(27) 0x4066c9 MOVSXD -0x4(%RCX),%RSI |
(27) 0x4066cd VMULSD %XMM8,%XMM8,%XMM9 |
(27) 0x4066d2 SAL $0x4,%RSI |
(27) 0x4066d6 VDIVSD 0x8(%RDI,%RSI,1),%XMM3,%XMM11 |
(27) 0x4066dc VFMADD231SD %XMM7,%XMM7,%XMM9 |
(27) 0x4066e1 VFMADD132SD %XMM10,%XMM9,%XMM10 |
(27) 0x4066e6 VFMADD231SD %XMM10,%XMM11,%XMM0 |
(27) 0x4066eb VMOVSD 0x8(%RDX),%XMM13 |
(27) 0x4066f0 VMOVSD (%RDX),%XMM12 |
(27) 0x4066f4 ADD $0x4,%RCX |
(27) 0x4066f8 ADD $0x18,%RDX |
(27) 0x4066fc VMOVSD -0x8(%RDX),%XMM15 |
(27) 0x406701 MOVSXD -0x4(%RCX),%R10 |
(27) 0x406705 VMULSD %XMM13,%XMM13,%XMM14 |
(27) 0x40670a SAL $0x4,%R10 |
(27) 0x40670e VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM1 |
(27) 0x406715 VFMADD231SD %XMM12,%XMM12,%XMM14 |
(27) 0x40671a VFMADD132SD %XMM15,%XMM14,%XMM15 |
(27) 0x40671f VFMADD231SD %XMM15,%XMM1,%XMM0 |
(27) 0x406724 CMP %RCX,%R14 |
(27) 0x406727 JE 406801 |
(28) 0x40672d VMOVSD 0x8(%RDX),%XMM2 |
(28) 0x406732 VMOVSD (%RDX),%XMM4 |
(28) 0x406736 ADD $0x10,%RCX |
(28) 0x40673a ADD $0x60,%RDX |
(28) 0x40673e VMOVSD -0x50(%RDX),%XMM6 |
(28) 0x406743 VMOVSD -0x40(%RDX),%XMM8 |
(28) 0x406748 VMULSD %XMM2,%XMM2,%XMM5 |
(28) 0x40674c MOVSXD -0x10(%RCX),%RSI |
(28) 0x406750 VMOVSD -0x28(%RDX),%XMM13 |
(28) 0x406755 VMULSD %XMM8,%XMM8,%XMM9 |
(28) 0x40675a VMOVSD -0x38(%RDX),%XMM10 |
(28) 0x40675f VMOVSD -0x30(%RDX),%XMM12 |
(28) 0x406764 VMULSD %XMM13,%XMM13,%XMM14 |
(28) 0x406769 SAL $0x4,%RSI |
(28) 0x40676d VMOVSD -0x10(%RDX),%XMM1 |
(28) 0x406772 MOVSXD -0xc(%RCX),%R10 |
(28) 0x406776 VDIVSD 0x8(%RDI,%RSI,1),%XMM3,%XMM7 |
(28) 0x40677c VMOVSD -0x20(%RDX),%XMM15 |
(28) 0x406781 VMOVSD -0x18(%RDX),%XMM2 |
(28) 0x406786 SAL $0x4,%R10 |
(28) 0x40678a MOVSXD -0x8(%RCX),%RSI |
(28) 0x40678e VFMADD231SD %XMM4,%XMM4,%XMM5 |
(28) 0x406793 VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM11 |
(28) 0x40679a MOVSXD -0x4(%RCX),%R10 |
(28) 0x40679e SAL $0x4,%RSI |
(28) 0x4067a2 VFMADD231SD %XMM12,%XMM12,%XMM14 |
(28) 0x4067a7 VDIVSD 0x8(%RDI,%RSI,1),%XMM3,%XMM4 |
(28) 0x4067ad SAL $0x4,%R10 |
(28) 0x4067b1 VFMADD132SD %XMM6,%XMM5,%XMM6 |
(28) 0x4067b6 VMULSD %XMM1,%XMM1,%XMM5 |
(28) 0x4067ba VFMADD132SD %XMM15,%XMM14,%XMM15 |
(28) 0x4067bf VFMADD132SD %XMM6,%XMM0,%XMM7 |
(28) 0x4067c4 VMOVSD -0x48(%RDX),%XMM0 |
(28) 0x4067c9 VMOVSD -0x8(%RDX),%XMM6 |
(28) 0x4067ce VFMADD231SD %XMM2,%XMM2,%XMM5 |
(28) 0x4067d3 VFMADD231SD %XMM0,%XMM0,%XMM9 |
(28) 0x4067d8 VDIVSD 0x8(%RDI,%R10,1),%XMM3,%XMM0 |
(28) 0x4067df VFMADD231SD %XMM6,%XMM6,%XMM5 |
(28) 0x4067e4 VFMADD132SD %XMM10,%XMM9,%XMM10 |
(28) 0x4067e9 VFMADD132SD %XMM10,%XMM7,%XMM11 |
(28) 0x4067ee VFMADD132SD %XMM15,%XMM11,%XMM4 |
(28) 0x4067f3 VFMADD132SD %XMM5,%XMM4,%XMM0 |
(28) 0x4067f8 CMP %RCX,%R14 |
(28) 0x4067fb JNE 40672d |
(27) 0x406801 INC %R9 |
(27) 0x406804 ADD $0x40,%R8D |
(27) 0x406808 ADD $0x600,%R11 |
(27) 0x40680f CMP %R9D,%EAX |
(27) 0x406812 JG 406620 |
0x406818 MOV 0x8(%R12),%RAX |
0x40681d LEA 0x8(%R12),%RBX |
(26) 0x406822 VMOVQ %RAX,%XMM3 |
(26) 0x406827 VADDSD %XMM3,%XMM0,%XMM7 |
(26) 0x40682b VMOVQ %XMM7,%R12 |
(26) 0x406830 LOCK CMPXCHG %R12,(%RBX) |
(26) 0x406835 JNE 406822 |
0x406837 POP %RBX |
0x406838 POP %R12 |
0x40683a POP %R13 |
0x40683c POP %R14 |
0x40683e POP %RBP |
0x40683f RET |
0x406840 INC %EAX |
0x406842 XOR %EDX,%EDX |
0x406844 JMP 4065e6 |
0x406849 NOPL (%RAX) |
| Path / |
| Source file and lines | timestep.c:107-116 |
| Module | exec |
| nb instructions | 43 |
| nb uops | 48 |
| loop length | 147 |
| used x86 registers | 12 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 8.00 cycles |
| front end | 8.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 3.00 | 4.00 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
| cycles | 3.00 | 5.33 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
| Cycles executing div or sqrt instructions | 6.00 |
| FE+BE cycles | 7.71 |
| Stall cycles | 0.00 |
| Front-end | 8.00 |
| Dispatch | 5.33 |
| DIV/SQRT | 6.00 |
| Overall L1 | 8.00 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 50% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 6% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 10% |
| all | 7% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 6% |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 7% |
| all | 18% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| all | 9% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 6% |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 9% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| CALL 403060 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
| MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CALL 403150 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
| MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
| CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JL 406840 <kineticEnergy._omp_fn.0+0x290> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JGE 406818 <kineticEnergy._omp_fn.0+0x268> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| MOVSXD %R8D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
| MOV 0x78(%R14),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD 0xb5ec(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x6,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| LEA (%R9,%R9,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| SAL $0x9,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| MOV 0x8(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| LEA 0x8(%R12),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
| INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| JMP 4065e6 <kineticEnergy._omp_fn.0+0x36> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| Source file and lines | timestep.c:107-116 |
| Module | exec |
| nb instructions | 43 |
| nb uops | 48 |
| loop length | 147 |
| used x86 registers | 12 |
| used mmx registers | 0 |
| used xmm registers | 2 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 8.00 cycles |
| front end | 8.00 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 3.00 | 4.00 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
| cycles | 3.00 | 5.33 | 4.00 | 4.00 | 3.50 | 3.07 | 3.00 | 3.50 | 3.50 | 3.50 | 2.93 | 4.00 |
| Cycles executing div or sqrt instructions | 6.00 |
| FE+BE cycles | 7.71 |
| Stall cycles | 0.00 |
| Front-end | 8.00 |
| Dispatch | 5.33 |
| DIV/SQRT | 6.00 |
| Overall L1 | 8.00 |
| all | 0% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 0% |
| all | 50% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 6% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 0% |
| add-sub | 0% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 0% |
| other | 10% |
| all | 7% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 6% |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 7% |
| all | 18% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| all | 9% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | 6% |
| add-sub | 6% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | 6% |
| other | 9% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| MOV %RDI,%R12 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
| MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| CALL 403060 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
| MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOV %EAX,%R13D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CALL 403150 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
| MOV %EAX,%R8D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| IDIV %R13D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
| CMP %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JL 406840 <kineticEnergy._omp_fn.0+0x290> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| IMUL %EAX,%R8D | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VXORPD %XMM0,%XMM0,%XMM0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| ADD %EDX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| ADD %R8D,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| CMP %EAX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JGE 406818 <kineticEnergy._omp_fn.0+0x268> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| MOVSXD %R8D,%R9 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
| MOV 0x78(%R14),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD 0xb5ec(%RIP),%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x6,%R8D | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| LEA (%R9,%R9,2),%R11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| SAL $0x9,%R11 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| NOPL (%RAX,%RAX,1) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| MOV 0x8(%R12),%RAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| LEA 0x8(%R12),%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
| RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
| INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| JMP 4065e6 <kineticEnergy._omp_fn.0+0x36> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
| NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| Name | Coverage (%) | Time (s) |
|---|---|---|
| ▼kineticEnergy._omp_fn.0– | 0.14 | 0.02 |
| ▼Loop 27 - timestep.c:110-116 - exec– | 0.05 | 0.01 |
| ○Loop 28 - timestep.c:110-116 - exec | 0.1 | 0.01 |
| ○Loop 26 - timestep.c:107-107 - exec | 0 | 0 |
