| Loop Id: 57 | Module: exec | Source: haloExchange.c:621-629 | Coverage: 2.71% |
|---|
| Loop Id: 57 | Module: exec | Source: haloExchange.c:621-629 | Coverage: 2.71% |
|---|
0x4085c0 MOV (%R8,%RDX,4),%EDI [4] |
0x4085c4 MOV %EDI,(%RCX) [5] |
0x4085c6 MOV (%R9,%RDX,4),%EDI [1] |
0x4085ca MOV %EDI,0x4(%RCX) [5] |
0x4085cd VMOVUPS (%R12,%RAX,1),%XMM0 [2] |
0x4085d3 VBROADCASTSD 0x10(%R12,%RAX,1),%YMM1 [2] |
0x4085da VBLENDPS $0x30,%YMM1,%YMM0,%YMM0 |
0x4085e0 VBROADCASTSD (%R13,%RAX,1),%YMM1 [3] |
0x4085e7 VBLENDPS $-0x40,%YMM1,%YMM0,%YMM0 |
0x4085ed VMOVUPS %YMM0,0x8(%RCX) [5] |
0x4085f2 VMOVUPS 0x8(%R13,%RAX,1),%XMM0 [3] |
0x4085f9 VMOVUPS %XMM0,0x28(%RCX) [5] |
0x4085fe INC %RDX |
0x408601 ADD $0x18,%RAX |
0x408605 ADD $0x38,%RCX |
0x408609 CMP %R15,%RDX |
0x40860c JL 4085c0 |
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/haloExchange.c: 621 - 629 |
-------------------------------------------------------------------------------- |
621: for (int ii=begin, iTmp=0; ii<end; ++ii, ++iTmp) |
622: { |
623: tmp[iTmp].gid = atoms->gid[ii]; |
624: tmp[iTmp].type = atoms->iSpecies[ii]; |
625: tmp[iTmp].rx = atoms->r[ii][0]; |
626: tmp[iTmp].ry = atoms->r[ii][1]; |
627: tmp[iTmp].rz = atoms->r[ii][2]; |
628: tmp[iTmp].px = atoms->p[ii][0]; |
629: tmp[iTmp].py = atoms->p[ii][1]; |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.60 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 5.55 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.33 |
| Bottlenecks | micro-operation queue, |
| Function | sortAtomsInCell |
| Source | haloExchange.c:621-629 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.67 |
| CQA cycles if no scalar integer | 1.67 |
| CQA cycles if FP arith vectorized | 2.67 |
| CQA cycles if fully vectorized | 0.48 |
| Front-end cycles | 2.67 |
| DIV/SQRT cycles | 0.83 |
| P0 cycles | 1.00 |
| P1 cycles | 2.00 |
| P2 cycles | 2.00 |
| P3 cycles | 2.00 |
| P4 cycles | 0.67 |
| P5 cycles | 0.50 |
| P6 cycles | 2.00 |
| P7 cycles | 2.00 |
| P8 cycles | 2.00 |
| P9 cycles | 0.00 |
| P10 cycles | 2.00 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.79 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 17.00 |
| Nb uops | 16.00 |
| Nb loads | 6.00 |
| Nb stores | 4.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 42.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 56.00 |
| Bytes stored | 56.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 3.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 50.00 |
| Vectorization ratio load | 33.33 |
| Vectorization ratio store | 50.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 50.00 |
| Vector-efficiency ratio all | 22.92 |
| Vector-efficiency ratio load | 14.58 |
| Vector-efficiency ratio store | 21.88 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 31.25 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.60 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 5.55 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.33 |
| Bottlenecks | micro-operation queue, |
| Function | sortAtomsInCell |
| Source | haloExchange.c:621-629 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 2.67 |
| CQA cycles if no scalar integer | 1.67 |
| CQA cycles if FP arith vectorized | 2.67 |
| CQA cycles if fully vectorized | 0.48 |
| Front-end cycles | 2.67 |
| DIV/SQRT cycles | 0.83 |
| P0 cycles | 1.00 |
| P1 cycles | 2.00 |
| P2 cycles | 2.00 |
| P3 cycles | 2.00 |
| P4 cycles | 0.67 |
| P5 cycles | 0.50 |
| P6 cycles | 2.00 |
| P7 cycles | 2.00 |
| P8 cycles | 2.00 |
| P9 cycles | 0.00 |
| P10 cycles | 2.00 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 2.79 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 17.00 |
| Nb uops | 16.00 |
| Nb loads | 6.00 |
| Nb stores | 4.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 0.00 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 42.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 56.00 |
| Bytes stored | 56.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 3.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 50.00 |
| Vectorization ratio load | 33.33 |
| Vectorization ratio store | 50.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 50.00 |
| Vector-efficiency ratio all | 22.92 |
| Vector-efficiency ratio load | 14.58 |
| Vector-efficiency ratio store | 21.88 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 31.25 |
| Path / |
| Function | sortAtomsInCell |
| Source file and lines | haloExchange.c:621-629 |
| Module | exec |
| nb instructions | 17 |
| nb uops | 16 |
| loop length | 78 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 2 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.67 cycles |
| front end | 2.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.83 | 1.00 | 2.00 | 2.00 | 2.00 | 0.67 | 0.50 | 2.00 | 2.00 | 2.00 | 0.00 | 2.00 |
| cycles | 0.83 | 1.00 | 2.00 | 2.00 | 2.00 | 0.67 | 0.50 | 2.00 | 2.00 | 2.00 | 0.00 | 2.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.79 |
| Stall cycles | 0.00 |
| Front-end | 2.67 |
| Dispatch | 2.00 |
| Data deps. | 1.00 |
| Overall L1 | 2.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 75% |
| load | 50% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 50% |
| load | 33% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 6% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 31% |
| load | 18% |
| store | 37% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 31% |
| all | 22% |
| load | 14% |
| store | 21% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 31% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV (%R8,%RDX,4),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOV %EDI,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV (%R9,%RDX,4),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOV %EDI,0x4(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
| VMOVUPS (%R12,%RAX,1),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBROADCASTSD 0x10(%R12,%RAX,1),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBLENDPS $0x30,%YMM1,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBROADCASTSD (%R13,%RAX,1),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBLENDPS $-0x40,%YMM1,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPS %YMM0,0x8(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPS 0x8(%R13,%RAX,1),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPS %XMM0,0x28(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x38,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JL 4085c0 <sortAtomsInCell+0x70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | sortAtomsInCell |
| Source file and lines | haloExchange.c:621-629 |
| Module | exec |
| nb instructions | 17 |
| nb uops | 16 |
| loop length | 78 |
| used x86 registers | 9 |
| used mmx registers | 0 |
| used xmm registers | 1 |
| used ymm registers | 2 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.67 cycles |
| front end | 2.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 0.83 | 1.00 | 2.00 | 2.00 | 2.00 | 0.67 | 0.50 | 2.00 | 2.00 | 2.00 | 0.00 | 2.00 |
| cycles | 0.83 | 1.00 | 2.00 | 2.00 | 2.00 | 0.67 | 0.50 | 2.00 | 2.00 | 2.00 | 0.00 | 2.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 2.79 |
| Stall cycles | 0.00 |
| Front-end | 2.67 |
| Dispatch | 2.00 |
| Data deps. | 1.00 |
| Overall L1 | 2.67 |
| all | 0% |
| load | 0% |
| store | 0% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 75% |
| load | 50% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 50% |
| load | 33% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 50% |
| all | 6% |
| load | 6% |
| store | 6% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 31% |
| load | 18% |
| store | 37% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 31% |
| all | 22% |
| load | 14% |
| store | 21% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 31% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOV (%R8,%RDX,4),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOV %EDI,(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
| MOV (%R9,%RDX,4),%EDI | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOV %EDI,0x4(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
| VMOVUPS (%R12,%RAX,1),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBROADCASTSD 0x10(%R12,%RAX,1),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBLENDPS $0x30,%YMM1,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBROADCASTSD (%R13,%RAX,1),%YMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VBLENDPS $-0x40,%YMM1,%YMM0,%YMM0 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VMOVUPS %YMM0,0x8(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPS 0x8(%R13,%RAX,1),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVUPS %XMM0,0x28(%RCX) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| INC %RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x18,%RAX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x38,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %R15,%RDX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JL 4085c0 <sortAtomsInCell+0x70> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
