| Loop Id: 64 | Module: exec | Source: initAtoms.c:126-133 | Coverage: 0.03% |
|---|
| Loop Id: 64 | Module: exec | Source: initAtoms.c:126-133 | Coverage: 0.03% |
|---|
0x409210 VPMOVSXDQ (%R15,%RBX,4),%YMM10 [2] |
0x409216 KXNORW %K0,%K0,%K1 |
0x40921a VXORPD %XMM11,%XMM11,%XMM11 |
0x40921f VPSLLQ $0x4,%YMM10,%YMM10 |
0x409225 VGATHERQPD 0x8(%R9,%YMM10,1),%YMM11{%K1} [1] |
0x40922d VMOVUPD 0x20(%R13),%YMM10 [3] |
0x409233 VBLENDPD $0x3,(%R13),%YMM10,%YMM12 [3] |
0x40923a VMOVUPD 0x10(%R13),%XMM13 [3] |
0x409240 VINSERTF128 $0x1,0x40(%R13),%YMM13,%YMM13 [3] |
0x409247 VMOVUPD 0x20(%R13),%XMM14 [3] |
0x40924d VBLENDPD $0xc,0x40(%R13),%YMM14,%YMM14 [3] |
0x409254 VBROADCASTSD 0x50(%R13),%YMM15 [3] |
0x40925a VSHUFPD $0x5,%YMM10,%YMM12,%YMM10 |
0x409260 VBLENDPD $0xa,%YMM13,%YMM12,%YMM12 |
0x409266 VBLENDPD $0x8,%YMM15,%YMM10,%YMM10 |
0x40926c VFMADD231PD %YMM11,%YMM7,%YMM12 |
0x409271 VFMADD231PD %YMM11,%YMM8,%YMM10 |
0x409276 VBLENDPD $0xa,%YMM14,%YMM13,%YMM13 |
0x40927c VFMADD231PD %YMM11,%YMM9,%YMM13 |
0x409281 VMOVAPD %YMM10,%YMM11 |
0x409286 VPERMT2PD %YMM12,%YMM0,%YMM11 |
0x40928c VMOVAPD %YMM10,%YMM14 |
0x409291 VPERMT2PD %YMM12,%YMM1,%YMM14 |
0x409297 VPERMT2PD %YMM10,%YMM2,%YMM12 |
0x40929d VPERMT2PD %YMM13,%YMM3,%YMM12 |
0x4092a3 VBLENDPD $0x2,%YMM13,%YMM14,%YMM10 |
0x4092a9 VPERMT2PD %YMM11,%YMM4,%YMM13 |
0x4092af VMOVUPD %YMM10,0x20(%R13) [3] |
0x4092b5 VMOVUPD %YMM13,0x40(%R13) [3] |
0x4092bb VMOVUPD %YMM12,(%R13) [3] |
0x4092c1 ADD $0x60,%R13 |
0x4092c5 ADD $0x4,%RBX |
0x4092c9 CMP %EDX,%EBX |
0x4092cb JLE 409210 |
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 126 - 133 |
-------------------------------------------------------------------------------- |
126: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
127: { |
128: int iSpecies = s->atoms->iSpecies[iOff]; |
129: real_t mass = s->species[iSpecies].mass; |
130: |
131: s->atoms->p[iOff][0] += mass * vShift[0]; |
132: s->atoms->p[iOff][1] += mass * vShift[1]; |
133: s->atoms->p[iOff][2] += mass * vShift[2]; |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.12 |
| CQA speedup if fully vectorized | 2.20 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P0, |
| Function | setVcm.extracted |
| Source | initAtoms.c:126-133 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 7.50 |
| CQA cycles if no scalar integer | 7.00 |
| CQA cycles if FP arith vectorized | 6.67 |
| CQA cycles if fully vectorized | 3.42 |
| Front-end cycles | 6.83 |
| DIV/SQRT cycles | 7.50 |
| P0 cycles | 7.17 |
| P1 cycles | 4.00 |
| P2 cycles | 4.00 |
| P3 cycles | 1.50 |
| P4 cycles | 7.33 |
| P5 cycles | 1.00 |
| P6 cycles | 1.50 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 0.00 |
| P10 cycles | 4.00 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 10.73 - 94.40 |
| Stall cycles (UFS) | 3.38 - 87.05 |
| Nb insns | 34.00 |
| Nb uops | 41.00 |
| Nb loads | 9.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 3.20 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 39.47 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 200.00 |
| Bytes stored | 96.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 96.55 |
| Vectorization ratio load | 88.89 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 94.74 |
| Vector-efficiency ratio all | 44.40 |
| Vector-efficiency ratio load | 34.72 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 45.39 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.07 |
| CQA speedup if FP arith vectorized | 1.12 |
| CQA speedup if fully vectorized | 2.20 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.02 |
| Bottlenecks | P0, |
| Function | setVcm.extracted |
| Source | initAtoms.c:126-133 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | main |
| Unroll factor | 4 |
| CQA cycles | 7.50 |
| CQA cycles if no scalar integer | 7.00 |
| CQA cycles if FP arith vectorized | 6.67 |
| CQA cycles if fully vectorized | 3.42 |
| Front-end cycles | 6.83 |
| DIV/SQRT cycles | 7.50 |
| P0 cycles | 7.17 |
| P1 cycles | 4.00 |
| P2 cycles | 4.00 |
| P3 cycles | 1.50 |
| P4 cycles | 7.33 |
| P5 cycles | 1.00 |
| P6 cycles | 1.50 |
| P7 cycles | 1.50 |
| P8 cycles | 1.50 |
| P9 cycles | 0.00 |
| P10 cycles | 4.00 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 10.73 - 94.40 |
| Stall cycles (UFS) | 3.38 - 87.05 |
| Nb insns | 34.00 |
| Nb uops | 41.00 |
| Nb loads | 9.00 |
| Nb stores | 3.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 3.20 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 12.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 39.47 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 200.00 |
| Bytes stored | 96.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 0.00 |
| Stride unknown | 1.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 96.55 |
| Vectorization ratio load | 88.89 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 100.00 |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 94.74 |
| Vector-efficiency ratio all | 44.40 |
| Vector-efficiency ratio load | 34.72 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 50.00 |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 45.39 |
| Path / |
| Function | setVcm.extracted |
| Source file and lines | initAtoms.c:126-133 |
| Module | exec |
| nb instructions | 34 |
| nb uops | 41 |
| loop length | 193 |
| used x86 registers | 5 |
| used mmx registers | 0 |
| used xmm registers | 3 |
| used ymm registers | 14 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 6.83 cycles |
| front end | 6.83 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 7.50 | 7.17 | 4.00 | 4.00 | 1.50 | 7.33 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 4.00 |
| cycles | 7.50 | 7.17 | 4.00 | 4.00 | 1.50 | 7.33 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 4.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 10.73-94.40 |
| Stall cycles | 3.38-87.05 |
| ROB full (events) | 2.66-90.49 |
| RS full (events) | 4.11-1.12 |
| Front-end | 6.83 |
| Dispatch | 7.50 |
| Data deps. | 1.00 |
| Overall L1 | 7.50 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 96% |
| load | 87% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 94% |
| all | 96% |
| load | 88% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 94% |
| all | 37% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 50% |
| all | 44% |
| load | 35% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 45% |
| all | 44% |
| load | 34% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 45% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VPMOVSXDQ (%R15,%RBX,4),%YMM10 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
| KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| VXORPD %XMM11,%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| VPSLLQ $0x4,%YMM10,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
| VGATHERQPD 0x8(%R9,%YMM10,1),%YMM11{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
| VMOVUPD 0x20(%R13),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0x3,(%R13),%YMM10,%YMM12 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VMOVUPD 0x10(%R13),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VINSERTF128 $0x1,0x40(%R13),%YMM13,%YMM13 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VMOVUPD 0x20(%R13),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0xc,0x40(%R13),%YMM14,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBROADCASTSD 0x50(%R13),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VSHUFPD $0x5,%YMM10,%YMM12,%YMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| VBLENDPD $0xa,%YMM13,%YMM12,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBLENDPD $0x8,%YMM15,%YMM10,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM11,%YMM7,%YMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM11,%YMM8,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VBLENDPD $0xa,%YMM14,%YMM13,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM11,%YMM9,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVAPD %YMM10,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM12,%YMM0,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVAPD %YMM10,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM12,%YMM1,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM10,%YMM2,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM13,%YMM3,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VBLENDPD $0x2,%YMM13,%YMM14,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VPERMT2PD %YMM11,%YMM4,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVUPD %YMM10,0x20(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPD %YMM13,0x40(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPD %YMM12,(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x60,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JLE 409210 <setVcm.extracted+0x160> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | setVcm.extracted |
| Source file and lines | initAtoms.c:126-133 |
| Module | exec |
| nb instructions | 34 |
| nb uops | 41 |
| loop length | 193 |
| used x86 registers | 5 |
| used mmx registers | 0 |
| used xmm registers | 3 |
| used ymm registers | 14 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 6.83 cycles |
| front end | 6.83 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 7.50 | 7.17 | 4.00 | 4.00 | 1.50 | 7.33 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 4.00 |
| cycles | 7.50 | 7.17 | 4.00 | 4.00 | 1.50 | 7.33 | 1.00 | 1.50 | 1.50 | 1.50 | 0.00 | 4.00 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 10.73-94.40 |
| Stall cycles | 3.38-87.05 |
| ROB full (events) | 2.66-90.49 |
| RS full (events) | 4.11-1.12 |
| Front-end | 6.83 |
| Dispatch | 7.50 |
| Data deps. | 1.00 |
| Overall L1 | 7.50 |
| all | 100% |
| load | 100% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 100% |
| all | 96% |
| load | 87% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 94% |
| all | 96% |
| load | 88% |
| store | 100% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 100% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 94% |
| all | 37% |
| load | 25% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| other | 50% |
| all | 44% |
| load | 35% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 45% |
| all | 44% |
| load | 34% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 45% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VPMOVSXDQ (%R15,%RBX,4),%YMM10 | 2 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 1 |
| KXNORW %K0,%K0,%K1 | 1 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| VXORPD %XMM11,%XMM11,%XMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
| VPSLLQ $0x4,%YMM10,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2-4 | 0.50 |
| VGATHERQPD 0x8(%R9,%YMM10,1),%YMM11{%K1} | 5 | 1 | 1 | 1.33 | 1.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 1.33 | 0-29 | 2 |
| VMOVUPD 0x20(%R13),%YMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0x3,(%R13),%YMM10,%YMM12 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VMOVUPD 0x10(%R13),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VINSERTF128 $0x1,0x40(%R13),%YMM13,%YMM13 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VMOVUPD 0x20(%R13),%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VBLENDPD $0xc,0x40(%R13),%YMM14,%YMM14 | 2 | 0.33 | 0.33 | 0.33 | 0.33 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.40 |
| VBROADCASTSD 0x50(%R13),%YMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 3 | 0.33 |
| VSHUFPD $0x5,%YMM10,%YMM12,%YMM10 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
| VBLENDPD $0xa,%YMM13,%YMM12,%YMM12 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VBLENDPD $0x8,%YMM15,%YMM10,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM11,%YMM7,%YMM12 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VFMADD231PD %YMM11,%YMM8,%YMM10 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VBLENDPD $0xa,%YMM14,%YMM13,%YMM13 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VFMADD231PD %YMM11,%YMM9,%YMM13 | 1 | 0.50 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 4 | 0.50 |
| VMOVAPD %YMM10,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM12,%YMM0,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVAPD %YMM10,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0-1 | 0.17 |
| VPERMT2PD %YMM12,%YMM1,%YMM14 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM10,%YMM2,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VPERMT2PD %YMM13,%YMM3,%YMM12 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VBLENDPD $0x2,%YMM13,%YMM14,%YMM10 | 1 | 0.33 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.33 |
| VPERMT2PD %YMM11,%YMM4,%YMM13 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVUPD %YMM10,0x20(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPD %YMM13,0x40(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVUPD %YMM12,(%R13) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x60,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x4,%RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %EDX,%EBX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JLE 409210 <setVcm.extracted+0x160> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
