| Loop Id: 98 | Module: exec | Source: timestep.c:88-94 | Coverage: 0.08% |
|---|
| Loop Id: 98 | Module: exec | Source: timestep.c:88-94 | Coverage: 0.08% |
|---|
0x40f610 MOVSXD (%RCX,%RBX,4),%R14 [2] |
0x40f614 SAL $0x4,%R14 |
0x40f618 VDIVSD 0x8(%R9,%R14,1),%XMM0,%XMM7 [3] |
0x40f61f VMOVUPD (%R11,%RDX,1),%XMM8 [1] |
0x40f625 VMOVDDUP %XMM7,%XMM9 |
0x40f629 VFMADD213PD (%R10,%RDX,1),%XMM8,%XMM9 [4] |
0x40f62f VMOVUPD %XMM9,(%R10,%RDX,1) [4] |
0x40f635 VMOVSD 0x10(%R11,%RDX,1),%XMM8 [1] |
0x40f63c VFMADD213SD 0x10(%R10,%RDX,1),%XMM7,%XMM8 [4] |
0x40f643 VMOVSD %XMM8,0x10(%R10,%RDX,1) [4] |
0x40f64a INC %RBX |
0x40f64d ADD $0x18,%RDX |
0x40f651 CMP %EBX,%R8D |
0x40f654 JNE 40f610 |
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/timestep.c: 88 - 94 |
-------------------------------------------------------------------------------- |
88: for (int iOff=MAXATOMS*iBox,ii=0; ii<s->boxes->nAtoms[iBox]; ii++,iOff++) |
89: { |
90: int iSpecies = s->atoms->iSpecies[iOff]; |
91: real_t invMass = 1.0/s->species[iSpecies].mass; |
92: s->atoms->r[iOff][0] += dt*s->atoms->p[iOff][0]*invMass; |
93: s->atoms->r[iOff][1] += dt*s->atoms->p[iOff][1]*invMass; |
94: s->atoms->r[iOff][2] += dt*s->atoms->p[iOff][2]*invMass; |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 2.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.50 |
| Bottlenecks | P0, |
| Function | advancePosition.extracted |
| Source | timestep.c:88-94 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | peel/tail |
| Unroll factor | 1 |
| CQA cycles | 4.00 |
| CQA cycles if no scalar integer | 4.00 |
| CQA cycles if FP arith vectorized | 2.00 |
| CQA cycles if fully vectorized | 2.00 |
| Front-end cycles | 2.67 |
| DIV/SQRT cycles | 2.00 |
| P0 cycles | 1.50 |
| P1 cycles | 2.00 |
| P2 cycles | 2.00 |
| P3 cycles | 1.00 |
| P4 cycles | 1.00 |
| P5 cycles | 1.50 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 0.00 |
| P10 cycles | 2.00 |
| P11 cycles | 4.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 4.33 - 4.50 |
| Stall cycles (UFS) | 0.82 - 0.99 |
| Nb insns | 14.00 |
| Nb uops | 13.00 |
| Nb loads | 6.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.75 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 3.00 |
| Nb FLOP div | 1.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 21.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 60.00 |
| Bytes stored | 24.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 2.00 |
| Stride unknown | 0.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 37.50 |
| Vectorization ratio load | 40.00 |
| Vectorization ratio store | 50.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 50.00 |
| Vectorization ratio div_sqrt | 0.00 |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 17.19 |
| Vector-efficiency ratio load | 17.50 |
| Vector-efficiency ratio store | 18.75 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 18.75 |
| Vector-efficiency ratio div_sqrt | 12.50 |
| Vector-efficiency ratio other | 12.50 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 2.00 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.50 |
| Bottlenecks | P0, |
| Function | advancePosition.extracted |
| Source | timestep.c:88-94 |
| Source loop unroll info | unrolled by 4 |
| Source loop unroll confidence level | high |
| Unroll/vectorization loop type | peel/tail |
| Unroll factor | 1 |
| CQA cycles | 4.00 |
| CQA cycles if no scalar integer | 4.00 |
| CQA cycles if FP arith vectorized | 2.00 |
| CQA cycles if fully vectorized | 2.00 |
| Front-end cycles | 2.67 |
| DIV/SQRT cycles | 2.00 |
| P0 cycles | 1.50 |
| P1 cycles | 2.00 |
| P2 cycles | 2.00 |
| P3 cycles | 1.00 |
| P4 cycles | 1.00 |
| P5 cycles | 1.50 |
| P6 cycles | 1.00 |
| P7 cycles | 1.00 |
| P8 cycles | 1.00 |
| P9 cycles | 0.00 |
| P10 cycles | 2.00 |
| P11 cycles | 4.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 4.33 - 4.50 |
| Stall cycles (UFS) | 0.82 - 0.99 |
| Nb insns | 14.00 |
| Nb uops | 13.00 |
| Nb loads | 6.00 |
| Nb stores | 2.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.75 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 3.00 |
| Nb FLOP div | 1.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 21.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 60.00 |
| Bytes stored | 24.00 |
| Stride 0 | 0.00 |
| Stride 1 | 1.00 |
| Stride n | 2.00 |
| Stride unknown | 0.00 |
| Stride indirect | 1.00 |
| Vectorization ratio all | 37.50 |
| Vectorization ratio load | 40.00 |
| Vectorization ratio store | 50.00 |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | 50.00 |
| Vectorization ratio div_sqrt | 0.00 |
| Vectorization ratio other | 0.00 |
| Vector-efficiency ratio all | 17.19 |
| Vector-efficiency ratio load | 17.50 |
| Vector-efficiency ratio store | 18.75 |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | 18.75 |
| Vector-efficiency ratio div_sqrt | 12.50 |
| Vector-efficiency ratio other | 12.50 |
| Path / |
| Function | advancePosition.extracted |
| Source file and lines | timestep.c:88-94 |
| Module | exec |
| nb instructions | 14 |
| nb uops | 13 |
| loop length | 70 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.67 cycles |
| front end | 2.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.00 | 1.50 | 2.00 | 2.00 | 1.00 | 1.00 | 1.50 | 1.00 | 1.00 | 1.00 | 0.00 | 2.00 |
| cycles | 2.00 | 1.50 | 2.00 | 2.00 | 1.00 | 1.00 | 1.50 | 1.00 | 1.00 | 1.00 | 0.00 | 2.00 |
| Cycles executing div or sqrt instructions | 4.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 4.33-4.50 |
| Stall cycles | 0.82-0.99 |
| ROB full (events) | 1.23-1.44 |
| Front-end | 2.67 |
| Dispatch | 2.00 |
| DIV/SQRT | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 4.00 |
| all | 37% |
| load | 40% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | 0% |
| other | 0% |
| all | 17% |
| load | 17% |
| store | 18% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 18% |
| div/sqrt | 12% |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOVSXD (%RCX,%RBX,4),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VDIVSD 0x8(%R9,%R14,1),%XMM0,%XMM7 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 13-15 | 4 |
| VMOVUPD (%R11,%RDX,1),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVDDUP %XMM7,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| VFMADD213PD (%R10,%RDX,1),%XMM8,%XMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %XMM9,(%R10,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVSD 0x10(%R11,%RDX,1),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VFMADD213SD 0x10(%R10,%RDX,1),%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVSD %XMM8,0x10(%R10,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
| INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x18,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JNE 40f610 <advancePosition.extracted+0x360> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | advancePosition.extracted |
| Source file and lines | timestep.c:88-94 |
| Module | exec |
| nb instructions | 14 |
| nb uops | 13 |
| loop length | 70 |
| used x86 registers | 8 |
| used mmx registers | 0 |
| used xmm registers | 4 |
| used ymm registers | 0 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 2.67 cycles |
| front end | 2.67 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.00 | 1.50 | 2.00 | 2.00 | 1.00 | 1.00 | 1.50 | 1.00 | 1.00 | 1.00 | 0.00 | 2.00 |
| cycles | 2.00 | 1.50 | 2.00 | 2.00 | 1.00 | 1.00 | 1.50 | 1.00 | 1.00 | 1.00 | 0.00 | 2.00 |
| Cycles executing div or sqrt instructions | 4.00 |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 4.33-4.50 |
| Stall cycles | 0.82-0.99 |
| ROB full (events) | 1.23-1.44 |
| Front-end | 2.67 |
| Dispatch | 2.00 |
| DIV/SQRT | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 4.00 |
| all | 37% |
| load | 40% |
| store | 50% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 50% |
| div/sqrt | 0% |
| other | 0% |
| all | 17% |
| load | 17% |
| store | 18% |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | 18% |
| div/sqrt | 12% |
| other | 12% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOVSXD (%RCX,%RBX,4),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VDIVSD 0x8(%R9,%R14,1),%XMM0,%XMM7 | 1 | 1 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 13-15 | 4 |
| VMOVUPD (%R11,%RDX,1),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 0-1 | 0.33 |
| VMOVDDUP %XMM7,%XMM9 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 1 |
| VFMADD213PD (%R10,%RDX,1),%XMM8,%XMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %XMM9,(%R10,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMOVSD 0x10(%R11,%RDX,1),%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VFMADD213SD 0x10(%R10,%RDX,1),%XMM7,%XMM8 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVSD %XMM8,0x10(%R10,%RDX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 1 | 0.50 |
| INC %RBX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x18,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| CMP %EBX,%R8D | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JNE 40f610 <advancePosition.extracted+0x360> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
