| Loop Id: 52 | Module: exec | Source: initAtoms.c:221-228 [...] | Coverage: 0.02% |
|---|
| Loop Id: 52 | Module: exec | Source: initAtoms.c:221-228 [...] | Coverage: 0.02% |
|---|
0x408ea0 MOVSXD (%RCX),%R13 [6] |
0x408ea3 VMOVSD 0x8(%RDX),%XMM2 [7] |
0x408ea8 ADD $0x10,%RCX |
0x408eac ADD $0x60,%RDX |
0x408eb0 MOVSXD -0xc(%RCX),%R14 [3] |
0x408eb4 VMOVSD -0x40(%RDX),%XMM7 [5] |
0x408eb9 SAL $0x4,%R13 |
0x408ebd VMOVHPD -0x60(%RDX),%XMM2,%XMM3 [5] |
0x408ec2 VMOVSD -0x28(%RDX),%XMM13 [5] |
0x408ec7 VMOVSD 0x8(%RSI,%R13,1),%XMM1 [2] |
0x408ece SAL $0x4,%R14 |
0x408ed2 MOVSXD -0x8(%RCX),%R13 [3] |
0x408ed6 VMOVHPD -0x48(%RDX),%XMM7,%XMM8 [5] |
0x408edb VMOVSD 0x8(%RSI,%R14,1),%XMM9 [1] |
0x408ee2 MOVSXD -0x4(%RCX),%R14 [3] |
0x408ee6 VMOVHPD -0x30(%RDX),%XMM13,%XMM14 [5] |
0x408eeb VMOVHPD -0x50(%RDX),%XMM1,%XMM4 [5] |
0x408ef0 SAL $0x4,%R13 |
0x408ef4 VMOVSD -0x10(%RDX),%XMM1 [5] |
0x408ef9 VINSERTF128 $0x1,%XMM3,%YMM4,%YMM5 |
0x408eff VMOVHPD -0x38(%RDX),%XMM9,%XMM10 [5] |
0x408f04 VMOVSD 0x8(%RSI,%R13,1),%XMM15 [4] |
0x408f0b SAL $0x4,%R14 |
0x408f0f VADDPD %YMM5,%YMM0,%YMM6 |
0x408f13 VINSERTF128 $0x1,%XMM8,%YMM10,%YMM11 |
0x408f19 VMOVSD 0x8(%RSI,%R14,1),%XMM5 [8] |
0x408f20 VMOVHPD -0x18(%RDX),%XMM1,%XMM4 [5] |
0x408f25 VMOVHPD -0x20(%RDX),%XMM15,%XMM0 [5] |
0x408f2a VINSERTF128 $0x1,%XMM14,%YMM0,%YMM2 |
0x408f30 VADDPD %YMM11,%YMM6,%YMM12 |
0x408f35 VMOVHPD -0x8(%RDX),%XMM5,%XMM6 [5] |
0x408f3a VINSERTF128 $0x1,%XMM4,%YMM6,%YMM7 |
0x408f40 VADDPD %YMM2,%YMM12,%YMM3 |
0x408f44 VADDPD %YMM7,%YMM3,%YMM0 |
0x408f48 CMP %R9,%RCX |
0x408f4b JNE 408ea0 |
/home/eoseret/qaas_runs_CPU_9468/171-148-3214/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 221 - 228 |
-------------------------------------------------------------------------------- |
221: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
[...] |
228: v3 += s->species[iSpecies].mass; |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 5.54 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.80 |
| Bottlenecks | P5, |
| Function | computeVcm._omp_fn.0 |
| Source | initAtoms.c:221-221,initAtoms.c:228-228 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 12.00 |
| CQA cycles if no scalar integer | 12.00 |
| CQA cycles if FP arith vectorized | 12.00 |
| CQA cycles if fully vectorized | 2.17 |
| Front-end cycles | 5.83 |
| DIV/SQRT cycles | 2.50 |
| P0 cycles | 4.00 |
| P1 cycles | 6.67 |
| P2 cycles | 6.67 |
| P3 cycles | 0.00 |
| P4 cycles | 12.00 |
| P5 cycles | 2.50 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| P8 cycles | 0.00 |
| P9 cycles | 0.00 |
| P10 cycles | 6.67 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 12 |
| FE+BE cycles (UFS) | 12.23 - 12.32 |
| Stall cycles (UFS) | 5.84 - 5.93 |
| Nb insns | 36.00 |
| Nb uops | 35.00 |
| Nb loads | 20.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.33 |
| Nb FLOP add-sub | 16.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 144.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 33.33 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 20.83 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 25.00 |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.00 |
| CQA speedup if fully vectorized | 5.54 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.80 |
| Bottlenecks | P5, |
| Function | computeVcm._omp_fn.0 |
| Source | initAtoms.c:221-221,initAtoms.c:228-228 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 12.00 |
| CQA cycles if no scalar integer | 12.00 |
| CQA cycles if FP arith vectorized | 12.00 |
| CQA cycles if fully vectorized | 2.17 |
| Front-end cycles | 5.83 |
| DIV/SQRT cycles | 2.50 |
| P0 cycles | 4.00 |
| P1 cycles | 6.67 |
| P2 cycles | 6.67 |
| P3 cycles | 0.00 |
| P4 cycles | 12.00 |
| P5 cycles | 2.50 |
| P6 cycles | 0.00 |
| P7 cycles | 0.00 |
| P8 cycles | 0.00 |
| P9 cycles | 0.00 |
| P10 cycles | 6.67 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 12 |
| FE+BE cycles (UFS) | 12.23 - 12.32 |
| Stall cycles (UFS) | 5.84 - 5.93 |
| Nb insns | 36.00 |
| Nb uops | 35.00 |
| Nb loads | 20.00 |
| Nb stores | 0.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 1.33 |
| Nb FLOP add-sub | 16.00 |
| Nb FLOP mul | 0.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 12.00 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 144.00 |
| Bytes stored | 0.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 2.00 |
| Vectorization ratio all | 33.33 |
| Vectorization ratio load | 0.00 |
| Vectorization ratio store | NA |
| Vectorization ratio mul | NA |
| Vectorization ratio add_sub | 100.00 |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | 100.00 |
| Vector-efficiency ratio all | 20.83 |
| Vector-efficiency ratio load | 12.50 |
| Vector-efficiency ratio store | NA |
| Vector-efficiency ratio mul | NA |
| Vector-efficiency ratio add_sub | 50.00 |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | 25.00 |
| Path / |
| Function | computeVcm._omp_fn.0 |
| Source file and lines | initAtoms.c:221-228 |
| Module | exec |
| nb instructions | 36 |
| nb uops | 35 |
| loop length | 177 |
| used x86 registers | 6 |
| used mmx registers | 0 |
| used xmm registers | 14 |
| used ymm registers | 10 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 5.83 cycles |
| front end | 5.83 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.50 | 4.00 | 6.67 | 6.67 | 0.00 | 12.00 | 2.50 | 0.00 | 0.00 | 0.00 | 0.00 | 6.67 |
| cycles | 2.50 | 4.00 | 6.67 | 6.67 | 0.00 | 12.00 | 2.50 | 0.00 | 0.00 | 0.00 | 0.00 | 6.67 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 12.00 |
| FE+BE cycles | 12.23-12.32 |
| Stall cycles | 5.84-5.93 |
| LB full (events) | 6.37-6.53 |
| LM full (events) | 0.69-0.60 |
| Front-end | 5.83 |
| Dispatch | 12.00 |
| Data deps. | 12.00 |
| Overall L1 | 12.00 |
| all | 33% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 20% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOVSXD (%RCX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD 0x8(%RDX),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| ADD $0x10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x60,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| MOVSXD -0xc(%RCX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD -0x40(%RDX),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VMOVHPD -0x60(%RDX),%XMM2,%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVSD -0x28(%RDX),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD 0x8(%RSI,%R13,1),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| MOVSXD -0x8(%RCX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVHPD -0x48(%RDX),%XMM7,%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVSD 0x8(%RSI,%R14,1),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOVSXD -0x4(%RCX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVHPD -0x30(%RDX),%XMM13,%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVHPD -0x50(%RDX),%XMM1,%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| SAL $0x4,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VMOVSD -0x10(%RDX),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VINSERTF128 $0x1,%XMM3,%YMM4,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVHPD -0x38(%RDX),%XMM9,%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVSD 0x8(%RSI,%R13,1),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VADDPD %YMM5,%YMM0,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VINSERTF128 $0x1,%XMM8,%YMM10,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVSD 0x8(%RSI,%R14,1),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVHPD -0x18(%RDX),%XMM1,%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVHPD -0x20(%RDX),%XMM15,%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VINSERTF128 $0x1,%XMM14,%YMM0,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VADDPD %YMM11,%YMM6,%YMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VMOVHPD -0x8(%RDX),%XMM5,%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VINSERTF128 $0x1,%XMM4,%YMM6,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VADDPD %YMM2,%YMM12,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VADDPD %YMM7,%YMM3,%YMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JNE 408ea0 <computeVcm._omp_fn.0+0x160> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | computeVcm._omp_fn.0 |
| Source file and lines | initAtoms.c:221-228 |
| Module | exec |
| nb instructions | 36 |
| nb uops | 35 |
| loop length | 177 |
| used x86 registers | 6 |
| used mmx registers | 0 |
| used xmm registers | 14 |
| used ymm registers | 10 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 5.83 cycles |
| front end | 5.83 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 2.50 | 4.00 | 6.67 | 6.67 | 0.00 | 12.00 | 2.50 | 0.00 | 0.00 | 0.00 | 0.00 | 6.67 |
| cycles | 2.50 | 4.00 | 6.67 | 6.67 | 0.00 | 12.00 | 2.50 | 0.00 | 0.00 | 0.00 | 0.00 | 6.67 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 12.00 |
| FE+BE cycles | 12.23-12.32 |
| Stall cycles | 5.84-5.93 |
| LB full (events) | 6.37-6.53 |
| LM full (events) | 0.69-0.60 |
| Front-end | 5.83 |
| Dispatch | 12.00 |
| Data deps. | 12.00 |
| Overall L1 | 12.00 |
| all | 33% |
| load | 0% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 100% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 100% |
| all | 20% |
| load | 12% |
| store | NA (no store vectorizable/vectorized instructions) |
| mul | NA (no mul vectorizable/vectorized instructions) |
| add-sub | 50% |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | 25% |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| MOVSXD (%RCX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD 0x8(%RDX),%XMM2 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| ADD $0x10,%RCX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| ADD $0x60,%RDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
| MOVSXD -0xc(%RCX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD -0x40(%RDX),%XMM7 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VMOVHPD -0x60(%RDX),%XMM2,%XMM3 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVSD -0x28(%RDX),%XMM13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVSD 0x8(%RSI,%R13,1),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| MOVSXD -0x8(%RCX),%R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVHPD -0x48(%RDX),%XMM7,%XMM8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVSD 0x8(%RSI,%R14,1),%XMM9 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| MOVSXD -0x4(%RCX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVHPD -0x30(%RDX),%XMM13,%XMM14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVHPD -0x50(%RDX),%XMM1,%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| SAL $0x4,%R13 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VMOVSD -0x10(%RDX),%XMM1 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VINSERTF128 $0x1,%XMM3,%YMM4,%YMM5 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVHPD -0x38(%RDX),%XMM9,%XMM10 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVSD 0x8(%RSI,%R13,1),%XMM15 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| SAL $0x4,%R14 | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
| VADDPD %YMM5,%YMM0,%YMM6 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VINSERTF128 $0x1,%XMM8,%YMM10,%YMM11 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VMOVSD 0x8(%RSI,%R14,1),%XMM5 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
| VMOVHPD -0x18(%RDX),%XMM1,%XMM4 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VMOVHPD -0x20(%RDX),%XMM15,%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VINSERTF128 $0x1,%XMM14,%YMM0,%YMM2 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VADDPD %YMM11,%YMM6,%YMM12 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VMOVHPD -0x8(%RDX),%XMM5,%XMM6 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4-12 | 1 |
| VINSERTF128 $0x1,%XMM4,%YMM6,%YMM7 | 1 | 0 | 0 | 0 | 0 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
| VADDPD %YMM2,%YMM12,%YMM3 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| VADDPD %YMM7,%YMM3,%YMM0 | 1 | 0 | 0.50 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 0.50 |
| CMP %R9,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JNE 408ea0 <computeVcm._omp_fn.0+0x160> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
