Function: setTemperature._omp_fn.1 | Module: exec | Source: initAtoms.c:174-181 | Coverage: 0.02% |
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Function: setTemperature._omp_fn.1 | Module: exec | Source: initAtoms.c:174-181 | Coverage: 0.02% |
---|
/home/eoseret/qaas_runs_CPU_9468/171-110-4860/intel/CoMD/build/CoMD/CoMD/src-openmp/initAtoms.c: 174 - 181 |
-------------------------------------------------------------------------------- |
174: #pragma omp parallel for |
175: for (int iBox=0; iBox<s->boxes->nLocalBoxes; ++iBox) |
176: { |
177: for (int iOff=MAXATOMS*iBox, ii=0; ii<s->boxes->nAtoms[iBox]; ++ii, ++iOff) |
178: { |
179: s->atoms->p[iOff][0] *= scaleFactor; |
180: s->atoms->p[iOff][1] *= scaleFactor; |
181: s->atoms->p[iOff][2] *= scaleFactor; |
0x405220 PUSH %RBP |
0x405221 MOV %RSP,%RBP |
0x405224 PUSH %R14 |
0x405226 PUSH %R13 |
0x405228 MOV %RDI,%R13 |
0x40522b PUSH %R12 |
0x40522d PUSH %RBX |
0x40522e MOV (%RDI),%RBX |
0x405231 MOV 0x18(%RBX),%R14 |
0x405235 CALL 403060 <omp_get_num_threads@plt> |
0x40523a MOV %EAX,%R12D |
0x40523d CALL 403150 <omp_get_thread_num@plt> |
0x405242 MOV %EAX,%ESI |
0x405244 MOV 0xc(%R14),%EAX |
0x405248 CLTD |
0x405249 IDIV %R12D |
0x40524c CMP %EDX,%ESI |
0x40524e JL 4053d6 |
0x405254 IMUL %EAX,%ESI |
0x405257 ADD %EDX,%ESI |
0x405259 ADD %ESI,%EAX |
0x40525b CMP %EAX,%ESI |
0x40525d JGE 4053cd |
0x405263 VMOVSD 0x8(%R13),%XMM0 |
0x405269 MOVSXD %ESI,%R13 |
0x40526c MOV 0x78(%R14),%R8 |
0x405270 LEA (%R13,%R13,2),%RDI |
0x405275 SAL $0x9,%RDI |
0x405279 NOPL (%RAX) |
(12) 0x405280 MOVSXD (%R8,%R13,4),%RCX |
(12) 0x405284 TEST %ECX,%ECX |
(12) 0x405286 JLE 4053ba |
(12) 0x40528c LEA (%RCX,%RCX,2),%R10 |
(12) 0x405290 MOV 0x20(%RBX),%R9 |
(12) 0x405294 MOV $0xaaaaaaaaaaaaaab,%R12 |
(12) 0x40529e LEA -0x18(,%R10,8),%R14 |
(12) 0x4052a6 SHR $0x3,%R14 |
(12) 0x4052aa MOV 0x20(%R9),%RDX |
(12) 0x4052ae IMUL %R12,%R14 |
(12) 0x4052b2 ADD %RDI,%RDX |
(12) 0x4052b5 LEA (%RDX,%R10,8),%R11 |
(12) 0x4052b9 INC %R14 |
(12) 0x4052bc AND $0x3,%R14D |
(12) 0x4052c0 JE 40533a |
(12) 0x4052c2 CMP $0x1,%R14 |
(12) 0x4052c6 JE 405310 |
(12) 0x4052c8 CMP $0x2,%R14 |
(12) 0x4052cc JE 4052ef |
(12) 0x4052ce VMULSD (%RDX),%XMM0,%XMM1 |
(12) 0x4052d2 ADD $0x18,%RDX |
(12) 0x4052d6 VMULSD -0x10(%RDX),%XMM0,%XMM2 |
(12) 0x4052db VMULSD -0x8(%RDX),%XMM0,%XMM3 |
(12) 0x4052e0 VMOVSD %XMM1,-0x18(%RDX) |
(12) 0x4052e5 VMOVSD %XMM2,-0x10(%RDX) |
(12) 0x4052ea VMOVSD %XMM3,-0x8(%RDX) |
(12) 0x4052ef VMULSD (%RDX),%XMM0,%XMM4 |
(12) 0x4052f3 ADD $0x18,%RDX |
(12) 0x4052f7 VMULSD -0x10(%RDX),%XMM0,%XMM5 |
(12) 0x4052fc VMULSD -0x8(%RDX),%XMM0,%XMM6 |
(12) 0x405301 VMOVSD %XMM4,-0x18(%RDX) |
(12) 0x405306 VMOVSD %XMM5,-0x10(%RDX) |
(12) 0x40530b VMOVSD %XMM6,-0x8(%RDX) |
(12) 0x405310 VMULSD (%RDX),%XMM0,%XMM7 |
(12) 0x405314 ADD $0x18,%RDX |
(12) 0x405318 VMULSD -0x10(%RDX),%XMM0,%XMM8 |
(12) 0x40531d VMULSD -0x8(%RDX),%XMM0,%XMM9 |
(12) 0x405322 VMOVSD %XMM7,-0x18(%RDX) |
(12) 0x405327 VMOVSD %XMM8,-0x10(%RDX) |
(12) 0x40532c VMOVSD %XMM9,-0x8(%RDX) |
(12) 0x405331 CMP %RDX,%R11 |
(12) 0x405334 JE 4053ba |
(13) 0x40533a VMULSD (%RDX),%XMM0,%XMM10 |
(13) 0x40533e ADD $0x60,%RDX |
(13) 0x405342 VMULSD -0x58(%RDX),%XMM0,%XMM11 |
(13) 0x405347 VMULSD -0x50(%RDX),%XMM0,%XMM12 |
(13) 0x40534c VMULSD -0x48(%RDX),%XMM0,%XMM13 |
(13) 0x405351 VMULSD -0x40(%RDX),%XMM0,%XMM14 |
(13) 0x405356 VMULSD -0x38(%RDX),%XMM0,%XMM15 |
(13) 0x40535b VMOVSD %XMM10,-0x60(%RDX) |
(13) 0x405360 VMULSD -0x30(%RDX),%XMM0,%XMM1 |
(13) 0x405365 VMOVSD %XMM11,-0x58(%RDX) |
(13) 0x40536a VMULSD -0x28(%RDX),%XMM0,%XMM2 |
(13) 0x40536f VMOVSD %XMM12,-0x50(%RDX) |
(13) 0x405374 VMULSD -0x20(%RDX),%XMM0,%XMM3 |
(13) 0x405379 VMOVSD %XMM13,-0x48(%RDX) |
(13) 0x40537e VMULSD -0x18(%RDX),%XMM0,%XMM4 |
(13) 0x405383 VMOVSD %XMM14,-0x40(%RDX) |
(13) 0x405388 VMULSD -0x10(%RDX),%XMM0,%XMM5 |
(13) 0x40538d VMOVSD %XMM15,-0x38(%RDX) |
(13) 0x405392 VMULSD -0x8(%RDX),%XMM0,%XMM6 |
(13) 0x405397 VMOVSD %XMM1,-0x30(%RDX) |
(13) 0x40539c VMOVSD %XMM2,-0x28(%RDX) |
(13) 0x4053a1 VMOVSD %XMM3,-0x20(%RDX) |
(13) 0x4053a6 VMOVSD %XMM4,-0x18(%RDX) |
(13) 0x4053ab VMOVSD %XMM5,-0x10(%RDX) |
(13) 0x4053b0 VMOVSD %XMM6,-0x8(%RDX) |
(13) 0x4053b5 CMP %RDX,%R11 |
(13) 0x4053b8 JNE 40533a |
(12) 0x4053ba INC %R13 |
(12) 0x4053bd ADD $0x600,%RDI |
(12) 0x4053c4 CMP %R13D,%EAX |
(12) 0x4053c7 JG 405280 |
0x4053cd POP %RBX |
0x4053ce POP %R12 |
0x4053d0 POP %R13 |
0x4053d2 POP %R14 |
0x4053d4 POP %RBP |
0x4053d5 RET |
0x4053d6 INC %EAX |
0x4053d8 XOR %EDX,%EDX |
0x4053da JMP 405254 |
0x4053df NOP |
Path / |
Source file and lines | initAtoms.c:174-181 |
Module | exec |
nb instructions | 39 |
nb uops | 44 |
loop length | 115 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 7.33 cycles |
front end | 7.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.70 | 4.00 | 3.67 | 3.67 | 3.50 | 2.87 | 2.70 | 3.50 | 3.50 | 3.50 | 2.73 | 3.67 |
cycles | 2.70 | 5.33 | 3.67 | 3.67 | 3.50 | 2.87 | 2.70 | 3.50 | 3.50 | 3.50 | 2.73 | 3.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 7.09-7.15 |
Stall cycles | 0.00 |
Front-end | 7.33 |
Dispatch | 5.33 |
DIV/SQRT | 6.00 |
Overall L1 | 7.33 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 7% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 7% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 7% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403060 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403150 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4053d6 <setTemperature._omp_fn.1+0x1b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4053cd <setTemperature._omp_fn.1+0x1ad> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0x8(%R13),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %ESI,%R13 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%R14),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R13,%R13,2),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x9,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 405254 <setTemperature._omp_fn.1+0x34> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Source file and lines | initAtoms.c:174-181 |
Module | exec |
nb instructions | 39 |
nb uops | 44 |
loop length | 115 |
used x86 registers | 11 |
used mmx registers | 0 |
used xmm registers | 1 |
used ymm registers | 0 |
used zmm registers | 0 |
nb stack references | 0 |
micro-operation queue | 7.33 cycles |
front end | 7.33 cycles |
P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
---|---|---|---|---|---|---|---|---|---|---|---|---|
uops | 2.70 | 4.00 | 3.67 | 3.67 | 3.50 | 2.87 | 2.70 | 3.50 | 3.50 | 3.50 | 2.73 | 3.67 |
cycles | 2.70 | 5.33 | 3.67 | 3.67 | 3.50 | 2.87 | 2.70 | 3.50 | 3.50 | 3.50 | 2.73 | 3.67 |
Cycles executing div or sqrt instructions | 6.00 |
FE+BE cycles | 7.09-7.15 |
Stall cycles | 0.00 |
Front-end | 7.33 |
Dispatch | 5.33 |
DIV/SQRT | 6.00 |
Overall L1 | 7.33 |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 0% |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 0% |
load | 0% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 0% |
add-sub | 0% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 0% |
other | 0% |
all | 7% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
other | 7% |
all | 12% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | NA (no mul vectorizable/vectorized instructions) |
add-sub | NA (no add-sub vectorizable/vectorized instructions) |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
other | NA (no other vectorizable/vectorized instructions) |
all | 7% |
load | 12% |
store | NA (no store vectorizable/vectorized instructions) |
mul | 6% |
add-sub | 6% |
fma | NA (no fma vectorizable/vectorized instructions) |
div/sqrt | 6% |
other | 7% |
Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
PUSH %RBP | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RSP,%RBP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R14 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %R13 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV %RDI,%R13 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
PUSH %R12 | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
PUSH %RBX | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 5-12 | 0.50 |
MOV (%RDI),%RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOV 0x18(%RBX),%R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CALL 403060 <omp_get_num_threads@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%R12D | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
CALL 403150 <omp_get_thread_num@plt> | 2 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0 | 1 |
MOV %EAX,%ESI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 1 | 0.17 |
MOV 0xc(%R14),%EAX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
CLTD | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 1 | 0.50 |
IDIV %R12D | 4 | 0 | 3 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 11-16 | 6 |
CMP %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JL 4053d6 <setTemperature._omp_fn.1+0x1b6> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
IMUL %EAX,%ESI | 1 | 0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 3 | 1 |
ADD %EDX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
ADD %ESI,%EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
CMP %EAX,%ESI | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
JGE 4053cd <setTemperature._omp_fn.1+0x1ad> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
VMOVSD 0x8(%R13),%XMM0 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
MOVSXD %ESI,%R13 | 1 | 0 | 0.33 | 0 | 0 | 0 | 0.33 | 0 | 0 | 0 | 0 | 0.33 | 0 | 1 | 0.33 |
MOV 0x78(%R14),%R8 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1 | 0.33 |
LEA (%R13,%R13,2),%RDI | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
SAL $0x9,%RDI | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0-2 | 0.50 |
NOPL (%RAX) | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
POP %RBX | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R12 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R13 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %R14 | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
POP %RBP | 1 | 0 | 0 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 1-6 | 0.33 |
RET | 1 | 0.50 | 0 | 0.33 | 0.33 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0.33 | 0 | 2.13 |
INC %EAX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
XOR %EDX,%EDX | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
JMP 405254 <setTemperature._omp_fn.1+0x34> | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 2.08 |
NOP | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.17 |
Name | Coverage (%) | Time (s) |
---|---|---|
▼setTemperature._omp_fn.1– | 0.02 | 0 |
▼Loop 12 - initAtoms.c:177-181 - exec– | 0.01 | 0 |
○Loop 13 - initAtoms.c:177-181 - exec | 0.01 | 0 |