| Loop Id: 5 | Module: exec | Source: stream.c:332-332 | Coverage: 19.96% |
|---|
| Loop Id: 5 | Module: exec | Source: stream.c:332-332 | Coverage: 19.96% |
|---|
0x4023ce VMULPD (%R10,%RCX,1),%YMM1,%YMM9 [2] |
0x4023d4 VMOVUPD %YMM9,(%R12,%RCX,1) [1] |
0x4023da VMULPD 0x20(%R10,%RCX,1),%YMM1,%YMM10 [2] |
0x4023e1 VMOVUPD %YMM10,0x20(%R12,%RCX,1) [1] |
0x4023e8 VMULPD 0x40(%R10,%RCX,1),%YMM1,%YMM11 [2] |
0x4023ef VMOVUPD %YMM11,0x40(%R12,%RCX,1) [1] |
0x4023f6 VMULPD 0x60(%R10,%RCX,1),%YMM1,%YMM12 [2] |
0x4023fd VMOVUPD %YMM12,0x60(%R12,%RCX,1) [1] |
0x402404 VMULPD 0x80(%R10,%RCX,1),%YMM1,%YMM13 [2] |
0x40240e VMOVUPD %YMM13,0x80(%R12,%RCX,1) [1] |
0x402418 VMULPD 0xa0(%R10,%RCX,1),%YMM1,%YMM14 [2] |
0x402422 VMOVUPD %YMM14,0xa0(%R12,%RCX,1) [1] |
0x40242c VMULPD 0xc0(%R10,%RCX,1),%YMM1,%YMM15 [2] |
0x402436 VMOVUPD %YMM15,0xc0(%R12,%RCX,1) [1] |
0x402440 VMULPD 0xe0(%R10,%RCX,1),%YMM1,%YMM2 [2] |
0x40244a VMOVUPD %YMM2,0xe0(%R12,%RCX,1) [1] |
0x402454 ADD $0x100,%RCX |
0x40245b CMP %RBX,%RCX |
0x40245e JNE 4023ce |
/home/eoseret/qaas_runs_CPU_9468/171-111-6305/intel/stream/build/stream/src/stream.c: 332 - 332 |
-------------------------------------------------------------------------------- |
332: b[j] = scalar*c[j]; |
| Path / |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.08 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.08 |
| Bottlenecks | micro-operation queue, |
| Function | main._omp_fn.5 |
| Source | stream.c:332-332 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.33 |
| CQA cycles if no scalar integer | 4.33 |
| CQA cycles if FP arith vectorized | 4.00 |
| CQA cycles if fully vectorized | 2.17 |
| Front-end cycles | 4.33 |
| DIV/SQRT cycles | 4.00 |
| P0 cycles | 4.00 |
| P1 cycles | 2.67 |
| P2 cycles | 2.67 |
| P3 cycles | 4.00 |
| P4 cycles | 0.60 |
| P5 cycles | 1.00 |
| P6 cycles | 4.00 |
| P7 cycles | 4.00 |
| P8 cycles | 4.00 |
| P9 cycles | 0.40 |
| P10 cycles | 2.67 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 4.49 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 19.00 |
| Nb uops | 18.00 |
| Nb loads | 8.00 |
| Nb stores | 8.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 7.38 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 32.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 118.15 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 256.00 |
| Bytes stored | 256.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Metric | Value |
|---|---|
| CQA speedup if no scalar integer | 1.00 |
| CQA speedup if FP arith vectorized | 1.08 |
| CQA speedup if fully vectorized | 2.00 |
| CQA speedup if no inter-iteration dependency | NA |
| CQA speedup if next bottleneck killed | 1.08 |
| Bottlenecks | micro-operation queue, |
| Function | main._omp_fn.5 |
| Source | stream.c:332-332 |
| Source loop unroll info | not unrolled or unrolled with no peel/tail loop |
| Source loop unroll confidence level | max |
| Unroll/vectorization loop type | NA |
| Unroll factor | NA |
| CQA cycles | 4.33 |
| CQA cycles if no scalar integer | 4.33 |
| CQA cycles if FP arith vectorized | 4.00 |
| CQA cycles if fully vectorized | 2.17 |
| Front-end cycles | 4.33 |
| DIV/SQRT cycles | 4.00 |
| P0 cycles | 4.00 |
| P1 cycles | 2.67 |
| P2 cycles | 2.67 |
| P3 cycles | 4.00 |
| P4 cycles | 0.60 |
| P5 cycles | 1.00 |
| P6 cycles | 4.00 |
| P7 cycles | 4.00 |
| P8 cycles | 4.00 |
| P9 cycles | 0.40 |
| P10 cycles | 2.67 |
| P11 cycles | 0.00 |
| Inter-iter dependencies cycles | 1 |
| FE+BE cycles (UFS) | 4.49 |
| Stall cycles (UFS) | 0.00 |
| Nb insns | 19.00 |
| Nb uops | 18.00 |
| Nb loads | 8.00 |
| Nb stores | 8.00 |
| Nb stack references | 0.00 |
| FLOP/cycle | 7.38 |
| Nb FLOP add-sub | 0.00 |
| Nb FLOP mul | 32.00 |
| Nb FLOP fma | 0.00 |
| Nb FLOP div | 0.00 |
| Nb FLOP rcp | 0.00 |
| Nb FLOP sqrt | 0.00 |
| Nb FLOP rsqrt | 0.00 |
| Bytes/cycle | 118.15 |
| Bytes prefetched | 0.00 |
| Bytes loaded | 256.00 |
| Bytes stored | 256.00 |
| Stride 0 | 0.00 |
| Stride 1 | 2.00 |
| Stride n | 0.00 |
| Stride unknown | 0.00 |
| Stride indirect | 0.00 |
| Vectorization ratio all | 100.00 |
| Vectorization ratio load | 100.00 |
| Vectorization ratio store | 100.00 |
| Vectorization ratio mul | 100.00 |
| Vectorization ratio add_sub | NA |
| Vectorization ratio fma | NA |
| Vectorization ratio div_sqrt | NA |
| Vectorization ratio other | NA |
| Vector-efficiency ratio all | 50.00 |
| Vector-efficiency ratio load | 50.00 |
| Vector-efficiency ratio store | 50.00 |
| Vector-efficiency ratio mul | 50.00 |
| Vector-efficiency ratio add_sub | NA |
| Vector-efficiency ratio fma | NA |
| Vector-efficiency ratio div_sqrt | NA |
| Vector-efficiency ratio other | NA |
| Path / |
| Function | main._omp_fn.5 |
| Source file and lines | stream.c:332-332 |
| Module | exec |
| nb instructions | 19 |
| nb uops | 18 |
| loop length | 150 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 9 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 4.33 cycles |
| front end | 4.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 4.00 | 4.00 | 2.67 | 2.67 | 4.00 | 0.60 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
| cycles | 4.00 | 4.00 | 2.67 | 2.67 | 4.00 | 0.60 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 4.49 |
| Stall cycles | 0.00 |
| Front-end | 4.33 |
| Dispatch | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 4.33 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMULPD (%R10,%RCX,1),%YMM1,%YMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM9,(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x20(%R10,%RCX,1),%YMM1,%YMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM10,0x20(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x40(%R10,%RCX,1),%YMM1,%YMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM11,0x40(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x60(%R10,%RCX,1),%YMM1,%YMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM12,0x60(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x80(%R10,%RCX,1),%YMM1,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM13,0x80(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0xa0(%R10,%RCX,1),%YMM1,%YMM14 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM14,0xa0(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0xc0(%R10,%RCX,1),%YMM1,%YMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM15,0xc0(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0xe0(%R10,%RCX,1),%YMM1,%YMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM2,0xe0(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x100,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| CMP %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JNE 4023ce <main._omp_fn.5+0x14e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
| Function | main._omp_fn.5 |
| Source file and lines | stream.c:332-332 |
| Module | exec |
| nb instructions | 19 |
| nb uops | 18 |
| loop length | 150 |
| used x86 registers | 4 |
| used mmx registers | 0 |
| used xmm registers | 0 |
| used ymm registers | 9 |
| used zmm registers | 0 |
| nb stack references | 0 |
| micro-operation queue | 4.33 cycles |
| front end | 4.33 cycles |
| P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | |
|---|---|---|---|---|---|---|---|---|---|---|---|---|
| uops | 4.00 | 4.00 | 2.67 | 2.67 | 4.00 | 0.60 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
| cycles | 4.00 | 4.00 | 2.67 | 2.67 | 4.00 | 0.60 | 1.00 | 4.00 | 4.00 | 4.00 | 0.40 | 2.67 |
| Cycles executing div or sqrt instructions | NA |
| Longest recurrence chain latency (RecMII) | 1.00 |
| FE+BE cycles | 4.49 |
| Stall cycles | 0.00 |
| Front-end | 4.33 |
| Dispatch | 4.00 |
| Data deps. | 1.00 |
| Overall L1 | 4.33 |
| all | 100% |
| load | 100% |
| store | 100% |
| mul | 100% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| all | 50% |
| load | 50% |
| store | 50% |
| mul | 50% |
| add-sub | NA (no add-sub vectorizable/vectorized instructions) |
| fma | NA (no fma vectorizable/vectorized instructions) |
| div/sqrt | NA (no div/sqrt vectorizable/vectorized instructions) |
| other | NA (no other vectorizable/vectorized instructions) |
| Instruction | Nb FU | P0 | P1 | P2 | P3 | P4 | P5 | P6 | P7 | P8 | P9 | P10 | P11 | Latency | Recip. throughput |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| VMULPD (%R10,%RCX,1),%YMM1,%YMM9 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM9,(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x20(%R10,%RCX,1),%YMM1,%YMM10 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM10,0x20(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x40(%R10,%RCX,1),%YMM1,%YMM11 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM11,0x40(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x60(%R10,%RCX,1),%YMM1,%YMM12 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM12,0x60(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0x80(%R10,%RCX,1),%YMM1,%YMM13 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM13,0x80(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0xa0(%R10,%RCX,1),%YMM1,%YMM14 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM14,0xa0(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0xc0(%R10,%RCX,1),%YMM1,%YMM15 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM15,0xc0(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| VMULPD 0xe0(%R10,%RCX,1),%YMM1,%YMM2 | 1 | 0.50 | 0.50 | 0.33 | 0.33 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0.33 | 4 | 0.50 |
| VMOVUPD %YMM2,0xe0(%R12,%RCX,1) | 1 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0.50 | 0.50 | 0.50 | 0 | 0 | 0-1 | 0.50 |
| ADD $0x100,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| CMP %RBX,%RCX | 1 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0.20 | 0 | 0 | 0 | 0.20 | 0 | 1 | 0.20 |
| JNE 4023ce <main._omp_fn.5+0x14e> | 1 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0.50 | 0 | 0 | 0 | 0 | 0 | 0 | 0.50 |
