OV - K-Means scalability acfl-O3 100000000 - Function k_means(int, point_t*, point_t*, int*, int, int) [clone .omp

	Function: k_means(int, point_t, point_t, int*, int, int) [clone .omp_outlined]	Module: kmeans-acfl-O3	Source: main.cpp:113-122	Coverage (incl. loops): 99.99% \| (excl. loops): 0.00%

/home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp: 113 - 122

--------------------------------------------------------------------------------

113:         #pragma omp parallel for

114:         for (int i = 0; i < n; ++i) {

115:             double optimal_dist = DBL_MAX;

116:             for (int j = 0; j < k; ++j) {

117:                 double dist =

118:                     (points[i].x - centroids[j].x) * (points[i].x - centroids[j].x) +

119:                     (points[i].y - centroids[j].y) * (points[i].y - centroids[j].y);

120:                 if (dist < optimal_dist) {

121:                     optimal_dist = dist;

122:                     assignment[i] = j;

0x1bec SUB	SP, SP, #96

0x1bf0 STP	X29, X30, [SP, #32]

0x1bf4 STP	X24, X23, [SP, #48]

0x1bf8 STP	X22, X21, [SP, #64]

0x1bfc STP	X20, X19, [SP, #80]

0x1c00 ADD	X29, SP, #32

0x1c04 LDR	W8, [X2]

0x1c08 SUBS	W24, W8, #1

0x1c0c B.LT	1d18

0x1c10 LDR	W21, [X0]

0x1c14 ORR	X19, XZR, X6

0x1c18 ORR	X23, XZR, X5

0x1c1c ORR	X22, XZR, X4

0x1c20 ORR	X20, XZR, X3

0x1c24 MOVZ	W8, #1

0x1c28 ADRP	X0,

0x1c2c ADD	X0, X0, #3240

0x1c30 ADD	X3, SP, #16

0x1c34 SUB	X4, X29, #4

0x1c38 SUB	X5, X29, #8

0x1c3c SUB	X6, X29, #12

0x1c40 ORR	W1, WZR, W21

0x1c44 MOVZ	W2, #34

0x1c48 MOVZ	W7, #1

0x1c4c STP	W24, WZR, [X29, #504]

0x1c50 STUR	W8, [X29, #500]

0x1c54 STR	WZR, [SP, #16]

0x1c58 STR	W8, [SP]

0x1c5c BL	1450

0x1c60 LDP	W9, W8, [X29, #504]

0x1c64 SBFM	X8, X8, #0, #31

0x1c68 CMP	W9, W24

0x1c6c CSEL	W11, W9, W24, #11

0x1c70 CMP	W8, W11

0x1c74 B.GT	1d08

0x1c78 LDR	W9, [X20]

0x1c7c CMP	W9, #1

0x1c80 B.LT	1d08

0x1c84 LDR	X12, [X23]

0x1c88 LDR	X10, [X22]

0x1c8c ADD	W11, W11, #1

0x1c90 ADD	X12, X12, #8

0x1c94 B	1ca4

(6) 0x1c98 ADD	X8, X8, #1

(6) 0x1c9c CMP	W11, W8

(6) 0x1ca0 B.EQ	1d08

(6) 0x1ca4 CMP	W9, #1

(6) 0x1ca8 B.LT	1c98

(6) 0x1cac ADD	X14, X10, X8,LSL #4

(6) 0x1cb0 MOVN	X15, #32784

(6) 0x1cb4 ORR	X13, XZR, XZR

(6) 0x1cb8 FMOV	D2, X15

(6) 0x1cbc ORR	X15, XZR, X12

(6) 0x1cc0 LDP	D0, D1, [X14]

(6) 0x1cc4 LDR	X14, [X19]

(6) 0x1cc8 B	1cdc

  (7) 0x1ccc ADD	X13, X13, #1

  (7) 0x1cd0 ADD	X15, X15, #16

  (7) 0x1cd4 CMP	X13, W9,SXTW

  (7) 0x1cd8 B.GE	1c98

  (7) 0x1cdc LDP	D4, D3, [X15, #1016]

  (7) 0x1ce0 FSUB	D3, D1, S3

  (7) 0x1ce4 FSUB	D4, D0, S4

  (7) 0x1ce8 FMUL	D3, D3, D3

  (7) 0x1cec FMADD	D3, D4, D4, D3

  (7) 0x1cf0 FCMP	D3, D2

  (7) 0x1cf4 B.PL	1ccc

  (7) 0x1cf8 FMOV	D2, D3

  (7) 0x1cfc STR	W13, [X14, X8,LSL #2]

  (7) 0x1d00 LDR	W9, [X20]

  (7) 0x1d04 B	1ccc

0x1d08 ADRP	X0,

0x1d0c ADD	X0, X0, #3264

0x1d10 ORR	W1, WZR, W21

0x1d14 BL	12e0

0x1d18 LDP	X20, X19, [SP, #80]

0x1d1c LDP	X22, X21, [SP, #64]

0x1d20 LDP	X24, X23, [SP, #48]

0x1d24 LDP	X29, X30, [SP, #32]

0x1d28 ADD	SP, SP, #96

0x1d2c RET

Coverage (%)	Name	Module
○96.04	__kmp_invoke_microtask	libomp.so
►3.96+	__kmp_invoke_microtask	libomp.so
○	Unknown function	ld-linux-aarch64.so.1

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

Coverage (%)	Name	Source Location	Module
○100.00	__kmp_invoke_microtask		libomp.so

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_1_thread

Source file and lines	main.cpp:113-122
Module	kmeans-acfl-O3

The function is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:113-122.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Your function is not vectorized. Only 24% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 7.50 to 4.62 cycles (1.62x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 7.50 to 1.00 cycles (7.50x speedup).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:113
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:113

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 100 bytes. The binary function is storing 84 bytes.

General properties

nb instructions	53
nb uops	53
loop length	212
used w registers	9
used x registers	18
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	10

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	6.63 cycles
front end	6.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	7.50	7.50	7.50	7.50	0.00	0.00	0.00	0.00	6.00	6.00	6.00	4.00	4.00
cycles	3.50	3.50	7.50	7.50	7.50	7.50	0.00	0.00	0.00	0.00	6.00	6.00	6.00	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.63
Dispatch	7.50
Overall L1	7.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	24%
load	18%
store	32%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	21%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.50 cycles. At this rate:

13% of peak load performance is reached (13.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.20 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 1bec

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
SUB SP, SP, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR W8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
SUBS W24, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
B.LT 1d18 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0x12c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W21, [X0]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ORR X19, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X23, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR X22, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR X20, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <1fc28>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #3240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X3, SP, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
STP W24, WZR, [X29, #504]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STUR W8, [X29, #500]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR W8, [SP]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 1450 <@plt_start@+0x1a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDP W9, W8, [X29, #504]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SBFM X8, X8, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (100.0%)
CMP W9, W24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
CSEL W11, W9, W24, #11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
CMP W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
B.GT 1d08 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
CMP W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
B.LT 1d08 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
ADD X12, X12, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
B 1ca4 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <1fd08>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #3264	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
BL 12e0 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD SP, SP, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_1_thread

Source file and lines	main.cpp:113-122
Module	kmeans-acfl-O3

The function is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:113-122.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 7.50 to 1.00 cycles (7.50x speedup).

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:113
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:113

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 100 bytes. The binary function is storing 84 bytes.

General properties

nb instructions	53
nb uops	53
loop length	212
used w registers	9
used x registers	18
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	0
nb stack references	10

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	6.63 cycles
front end	6.63 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	3.50	3.50	7.50	7.50	7.50	7.50	0.00	0.00	0.00	0.00	6.00	6.00	6.00	4.00	4.00
cycles	3.50	3.50	7.50	7.50	7.50	7.50	0.00	0.00	0.00	0.00	6.00	6.00	6.00	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

Cycles summary

Front-end	6.63
Dispatch	7.50
Overall L1	7.50

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

all	24%
load	18%
store	32%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	21%
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	22%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 7.50 cycles. At this rate:

13% of peak load performance is reached (13.33 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
23% of peak store performance is reached (11.20 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 1bec

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
SUB SP, SP, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
STP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #32	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
LDR W8, [X2]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
SUBS W24, W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
B.LT 1d18 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0x12c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W21, [X0]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ORR X19, XZR, X6	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ORR X23, XZR, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR X22, XZR, X4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR X20, XZR, X3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W8, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
ADRP X0, <1fc28>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #3240	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X3, SP, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X4, X29, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X5, X29, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X6, X29, #12	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
MOVZ W2, #34	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
MOVZ W7, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
STP W24, WZR, [X29, #504]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
STUR W8, [X29, #500]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR WZR, [SP, #16]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
STR W8, [SP]	1	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 1450 <@plt_start@+0x1a0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDP W9, W8, [X29, #504]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
SBFM X8, X8, #0, #31	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (100.0%)
CMP W9, W24	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
CSEL W11, W9, W24, #11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
CMP W8, W11	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
B.GT 1d08 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W9, [X20]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
CMP W9, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.33	scal (12.5%)
B.LT 1d08 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0x11c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR X12, [X23]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
LDR X10, [X22]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
ADD W11, W11, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
ADD X12, X12, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (25.0%)
B 1ca4 <_Z7k_meansiP7point_tS0_Piii.omp_outlined+0xb8>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADRP X0, <1fd08>	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ADD X0, X0, #3264	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
ORR W1, WZR, W21	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	scal (12.5%)
BL 12e0 <@plt_start@+0x30>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	1	0.50	N/A
LDP X20, X19, [SP, #80]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X22, X21, [SP, #64]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X24, X23, [SP, #48]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
LDP X29, X30, [SP, #32]	1	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	N/A
ADD SP, SP, #96	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	1	0.25	N/A
RET	1	0.50	0.50	0	0	0	0	0	0	0	0	0	1	0.50	N/A

▶Scalability Runs Description

Run run_1_thread	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_NUM_THREADS: 1OMP_PLACES: cores
Run run_2_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 2
Run run_4_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 4
Run run_8_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 8
Run run_16_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 16
Run run_32_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_PLACES: coresOMP_NUM_THREADS: 32
Run run_64_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_PLACES: coresOMP_NUM_THREADS: 64

(run_1_thread) Efficiency	(run_1_thread) Potential Speed-Up (%)	(run_2_threads) Efficiency	(run_2_threads) Potential Speed-Up (%)	(run_4_threads) Efficiency	(run_4_threads) Potential Speed-Up (%)	(run_8_threads) Efficiency	(run_8_threads) Potential Speed-Up (%)	(run_16_threads) Efficiency	(run_16_threads) Potential Speed-Up (%)	(run_32_threads) Efficiency	(run_32_threads) Potential Speed-Up (%)	(run_64_threads) Efficiency	(run_64_threads) Potential Speed-Up (%)
1	0	1	0.14	0.99	0.55	0.99	0.7	1	0.45	0.99	0.53	1.99	0

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
run_1_thread	1	1	1	1	129.90997314453	99.98844909668
run_2_threads	2	1	2	2	65.584999084473	99.151596069336
run_4_threads	4	0.99	3.98	4	33.514995574951	97.357856750488
run_8_threads	8	0.99	7.94	8	16.895002365112	96.107032775879
run_16_threads	16	1	15.92	16	8.4800004959106	94.532409667969
run_32_threads	32	0.99	31.81	32	4.5399994850159	87.834449768066
run_64_threads	64	1.99	127.3	64	2.0200002193451	35.620483398438

Name	Coverage (%)	Time (s)
▼k_means(int, point_t, point_t, int*, int, int) [clone .omp_outlined]–	99.99	129.91
▼Loop 6 - main.cpp:114-122 - kmeans-acfl-O3–	1.15	1.49
○Loop 7 - main.cpp:116-122 - kmeans-acfl-O3	98.84	128.42

Report Configuration

Vectorization

Details

Workaround

Expensive FP math instructions/calls

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Vectorization

Details

Workaround

Expensive FP math instructions/calls

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency