OV - K-Means scalability gcc-O3 100000000 - Function k_means(int, point_t*, point_t*, int*, int, int) [clone ._omp

	Function: k_means(int, point_t, point_t, int*, int, int) [clone ._omp_fn.1]	Module: kmeans-gcc-O3	Source: main.cpp:138-143	Coverage (incl. loops): 0.02% \| (excl. loops): 0.00%

/home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp: 138 - 143

--------------------------------------------------------------------------------

138:         #pragma omp parallel for reduction(+:sum_x[:k], sum_y[:k], count[:k])

139:         for (int i = 0; i < n; ++i) {

140:             int cid = assignment[i];

141:             count[cid] += 1;

142:             sum_x[cid] += points[i].x;

143:             sum_y[cid] += points[i].y;

0x401e24 STP	X29, X30, [SP, #912]!

0x401e28 ADD	X29, SP, #0

0x401e2c CNTW	X2, ALL

0x401e30 STP	X25, X26, [SP, #64]

0x401e34 ORR	X25, XZR, X0

0x401e38 SUB	X0, X2, #1

0x401e3c STP	X19, X20, [SP, #16]

0x401e40 STP	X21, X22, [SP, #32]

0x401e44 STP	X23, X24, [SP, #48]

0x401e48 STP	X27, X28, [SP, #80]

0x401e4c LDP	X1, X26, [X25]

0x401e50 LDR	X20, [X25, #80]

0x401e54 STR	X1, [X29, #96]

0x401e58 LDP	X24, X22, [X25, #64]

0x401e5c UBFM	X1, X24, #61, #60

0x401e60 SUB	X3, X24, #13

0x401e64 ADD	X1, X1, #23

0x401e68 CMP	X24, X0

0x401e6c AND	X1, X1, #7932

0x401e70 CCMN	X3, #15, #2, #2

0x401e74 LDR	W3, [X25, #88]

0x401e78 SUB	SP, SP, X1,UXTX

0x401e7c ADD	X23, SP, #0

0x401e80 B.HI	402394

0x401e84 ADDVL	X5, SP, #1

0x401e88 SUB	X0, X24, X0

0x401e8c PTRUE	P7.B, ALL

0x401e90 MOVN	X1, #0

0x401e94 ADD	X4, SP, #8

0x401e98 DUP	Z31.D, #0

0x401e9c ADD	X5, X5, #8

(21) 0x401ea0 ST1D	{Z31.D}, P7, [X4, X1,LSL #3]

(21) 0x401ea4 ORR	X6, XZR, X1

(21) 0x401ea8 ST1D	{Z31.D}, P7, [X5, X1,LSL #3]

(21) 0x401eac ADD	X1, X1, X2

(21) 0x401eb0 CMP	X0, X1

(21) 0x401eb4 B.HI	401ea0

0x401eb8 ADDPL	X2, X6, #2

0x401ebc ADD	X2, X2, #1

0x401ec0 UBFM	X0, X2, #61, #60

0x401ec4 CMP	X24, X1

0x401ec8 B.EQ	401ef0

0x401ecc SUB	X1, X0, X1,LSL #3

0x401ed0 SUB	X1, X1, #8

0x401ed4 ADD	X1, X23, X1

0x401ed8 HINT	#0

0x401edc HINT	#0

(22) 0x401ee0 STR	XZR, [X1, X2,LSL #3]

(22) 0x401ee4 ADD	X2, X2, #1

(22) 0x401ee8 CMP	X24, X2

(22) 0x401eec B.CS	401ee0

0x401ef0 UBFM	X1, X22, #61, #60

0x401ef4 CNTW	X2, ALL

0x401ef8 ADD	X1, X1, #23

0x401efc SUB	X0, X2, #1

0x401f00 AND	X1, X1, #7932

0x401f04 CMP	X22, X0

0x401f08 SUB	X4, X22, #13

0x401f0c SUB	SP, SP, X1,UXTX

0x401f10 CCMN	X4, #15, #2, #2

0x401f14 ADD	X21, SP, #0

0x401f18 B.HI	4023b4

0x401f1c ADDVL	X5, SP, #1

0x401f20 SUB	X0, X22, X0

0x401f24 PTRUE	P7.B, ALL

0x401f28 MOVN	X1, #0

0x401f2c ADD	X4, SP, #8

0x401f30 DUP	Z30.D, #0

0x401f34 ADD	X5, X5, #8

0x401f38 HINT	#0

0x401f3c HINT	#0

(19) 0x401f40 ST1D	{Z30.D}, P7, [X4, X1,LSL #3]

(19) 0x401f44 ORR	X6, XZR, X1

(19) 0x401f48 ST1D	{Z30.D}, P7, [X5, X1,LSL #3]

(19) 0x401f4c ADD	X1, X1, X2

(19) 0x401f50 CMP	X0, X1

(19) 0x401f54 B.HI	401f40

0x401f58 ADDPL	X2, X6, #2

0x401f5c ADD	X2, X2, #1

0x401f60 UBFM	X0, X2, #61, #60

0x401f64 CMP	X22, X1

0x401f68 B.EQ	401f90

0x401f6c SUB	X1, X0, X1,LSL #3

0x401f70 SUB	X1, X1, #8

0x401f74 ADD	X1, X21, X1

0x401f78 HINT	#0

0x401f7c HINT	#0

(20) 0x401f80 STR	XZR, [X1, X2,LSL #3]

(20) 0x401f84 ADD	X2, X2, #1

(20) 0x401f88 CMP	X22, X2

(20) 0x401f8c B.CS	401f80

0x401f90 ADD	X28, X20, #1

0x401f94 CNTD	X1, ALL

0x401f98 UBFM	X0, X28, #62, #61

0x401f9c SUB	X1, X1, #1

0x401fa0 ADD	X0, X0, #15

0x401fa4 CMP	X20, X1

0x401fa8 AND	X0, X0, #7932

0x401fac SUB	X1, X20, #16

0x401fb0 SUB	SP, SP, X0,UXTX

0x401fb4 CCMN	X1, #18, #2, #2

0x401fb8 ADD	X27, SP, #0

0x401fbc B.HI	402370

0x401fc0 CNTH	X2, ALL

0x401fc4 SUB	X0, X2, #1

0x401fc8 CMP	X20, X0

0x401fcc B.CC	4023f4

0x401fd0 ADDVL	X6, SP, #1

0x401fd4 SUB	X0, X20, X0

0x401fd8 PTRUE	P7.B, ALL

0x401fdc MOVN	X1, #0

0x401fe0 ADD	X4, SP, #4

0x401fe4 DUP	Z29.B, #0

0x401fe8 ADD	X6, X6, #4

(18) 0x401fec ST1W	{Z29.S}, P7, [X4, X1,LSL #2]

(18) 0x401ff0 ORR	X5, XZR, X1

(18) 0x401ff4 ST1W	{Z29.S}, P7, [X6, X1,LSL #2]

(18) 0x401ff8 ADD	X1, X1, X2

(18) 0x401ffc CMP	X0, X1

(18) 0x402000 B.HI	401fec

0x402004 ADDPL	X2, X5, #4

0x402008 ADD	X2, X2, #1

0x40200c ADD	X4, X27, X2,LSL #2

0x402010 CMP	X20, X1

0x402014 B.EQ	402090

0x402018 CNTD	X5, ALL

0x40201c SUB	X0, X20, X2

0x402020 ADD	X1, X5, #4

0x402024 SUB	X8, X28, X2

0x402028 CMP	X0, X1

0x40202c B.CC	402074

0x402030 ADD	X0, X2, #1

0x402034 SUB	X7, X8, X5

0x402038 PTRUE	P7.B, ALL

0x40203c ADD	X0, X27, X0,LSL #2

0x402040 MOVN	X1, #0

0x402044 DUP	Z28.B, #0

(17) 0x402048 ORR	X6, XZR, X1

(17) 0x40204c ST1W	{Z28.D}, P7, [X0, X1,LSL #2]

(17) 0x402050 ADD	X1, X1, X5

(17) 0x402054 CMP	X7, X1

(17) 0x402058 B.HI	402048

0x40205c ADDPL	X0, X6, #1

0x402060 ADD	X0, X0, #1

0x402064 ADD	X4, X4, X0,LSL #2

0x402068 ADD	X2, X2, X0

0x40206c CMP	X8, X0

0x402070 B.EQ	402090

0x402074 SUB	X0, X4, X2,LSL #2

0x402078 HINT	#0

0x40207c HINT	#0

(16) 0x402080 STR	WZR, [X0, X2,LSL #2]

(16) 0x402084 ADD	X2, X2, #1

(16) 0x402088 CMP	X20, X2

(16) 0x40208c B.CS	402080

0x402090 STR	W3, [X29, #104]

0x402094 BL	401930

0x402098 ORR	W19, WZR, W0

0x40209c BL	401880

0x4020a0 LDR	W3, [X29, #104]

0x4020a4 ORR	W1, WZR, W0

0x4020a8 SDIV	W5, W3, W19

0x4020ac MSUB	W0, W5, W19, W3

0x4020b0 CMP	W1, W0

0x4020b4 B.LT	402364

(10) 0x4020b8 MADD	W1, W5, W1, W0

(10) 0x4020bc ADD	W5, W5, W1

(10) 0x4020c0 CMP	W1, W5

(10) 0x4020c4 B.GE	40211c

(10) 0x4020c8 LDR	X2, [X29, #96]

(10) 0x4020cc SBFM	X0, X1, #0, #31

(10) 0x4020d0 ADD	X1, X2, W1,SXTW #4

(10) 0x4020d4 HINT	#0

(10) 0x4020d8 HINT	#0

(10) 0x4020dc HINT	#0

  (15) 0x4020e0 LDR	W2, [X26, X0,LSL #2]

  (15) 0x4020e4 ADD	X0, X0, #1

  (15) 0x4020e8 LDP	D24, D26, [X1], #16

  (15) 0x4020ec LDR	D25, [X23, X2,SXTW #3]

  (15) 0x4020f0 SBFM	X4, X2, #62, #31

  (15) 0x4020f4 LDR	D27, [X21, X2,SXTW #3]

  (15) 0x4020f8 LDR	W3, [X27, X4]

  (15) 0x4020fc FADD	D24, D25, D24

  (15) 0x402100 FADD	D26, D27, D26

  (15) 0x402104 ADD	W3, W3, #1

  (15) 0x402108 STR	W3, [X27, X4]

  (15) 0x40210c STR	D24, [X23, X2,SXTW #3]

  (15) 0x402110 STR	D26, [X21, X2,SXTW #3]

  (15) 0x402114 CMP	W5, W0

  (15) 0x402118 B.GT	4020e0

(10) 0x40211c LDR	X2, [X25, #24]

(10) 0x402120 LDR	X26, [X25, #40]

(10) 0x402124 LDR	X19, [X25, #56]

(10) 0x402128 STR	X2, [X29, #104]

(10) 0x40212c BL	401760

(10) 0x402130 CNTD	X3, ALL

(10) 0x402134 LDR	X2, [X29, #104]

(10) 0x402138 ADD	X0, X3, #1

(10) 0x40213c CMP	X24, X0

(10) 0x402140 B.CC	4023d4

(10) 0x402144 ADDPL	X6, X24, #63

(10) 0x402148 MOVN	X0, #0

(10) 0x40214c PTRUE	P7.B, ALL

(10) 0x402150 ADD	X6, X6, #1

(10) 0x402154 ADD	X4, X23, #8

(10) 0x402158 ADD	X1, X26, #8

(10) 0x40215c HINT	#0

  (14) 0x402160 LD1D	{Z23.D}, P7/Z, [X1, X0,LSL #3]

  (14) 0x402164 LD1D	{Z22.D}, P7/Z, [X4, X0,LSL #3]

  (14) 0x402168 ORR	X5, XZR, X0

  (14) 0x40216c FADD	Z22.D, Z23.D, Z22.D

  (14) 0x402170 ST1D	{Z22.D}, P7, [X1, X0,LSL #3]

  (14) 0x402174 ADD	X0, X0, X3

  (14) 0x402178 CMP	X6, X0

  (14) 0x40217c B.HI	402160

(10) 0x402180 ADDPL	X1, X5, #1

(10) 0x402184 ADD	X1, X1, #1

(10) 0x402188 ADD	X23, X23, X1,LSL #3

(10) 0x40218c ADD	X26, X26, X1,LSL #3

(10) 0x402190 CMP	X24, X0

(10) 0x402194 B.EQ	4021bc

(10) 0x402198 SUB	X0, X26, X1,LSL #3

(10) 0x40219c SUB	X23, X23, X1,LSL #3

  (7) 0x4021a0 LDR	D21, [X0, X1,LSL #3]

  (7) 0x4021a4 LDR	D20, [X23, X1,LSL #3]

  (7) 0x4021a8 FADD	D20, D21, D20

  (7) 0x4021ac STR	D20, [X0, X1,LSL #3]

  (7) 0x4021b0 ADD	X1, X1, #1

  (7) 0x4021b4 CMP	X24, X1

  (7) 0x4021b8 B.CS	4021a0

(10) 0x4021bc CNTD	X3, ALL

(10) 0x4021c0 ADD	X0, X3, #1

(10) 0x4021c4 CMP	X22, X0

(10) 0x4021c8 B.CC	4023dc

(10) 0x4021cc ADDPL	X6, X22, #63

(10) 0x4021d0 MOVN	X0, #0

(10) 0x4021d4 PTRUE	P7.B, ALL

(10) 0x4021d8 ADD	X6, X6, #1

(10) 0x4021dc ADD	X4, X21, #8

(10) 0x4021e0 ADD	X1, X19, #8

  (13) 0x4021e4 LD1D	{Z19.D}, P7/Z, [X1, X0,LSL #3]

  (13) 0x4021e8 LD1D	{Z18.D}, P7/Z, [X4, X0,LSL #3]

  (13) 0x4021ec ORR	X5, XZR, X0

  (13) 0x4021f0 FADD	Z18.D, Z19.D, Z18.D

  (13) 0x4021f4 ST1D	{Z18.D}, P7, [X1, X0,LSL #3]

  (13) 0x4021f8 ADD	X0, X0, X3

  (13) 0x4021fc CMP	X6, X0

  (13) 0x402200 B.HI	4021e4

(10) 0x402204 ADDPL	X1, X5, #1

(10) 0x402208 ADD	X1, X1, #1

(10) 0x40220c ADD	X21, X21, X1,LSL #3

(10) 0x402210 ADD	X19, X19, X1,LSL #3

(10) 0x402214 CMP	X22, X0

(10) 0x402218 B.EQ	402240

(10) 0x40221c SUB	X0, X19, X1,LSL #3

(10) 0x402220 SUB	X21, X21, X1,LSL #3

  (8) 0x402224 LDR	D17, [X0, X1,LSL #3]

  (8) 0x402228 LDR	D16, [X21, X1,LSL #3]

  (8) 0x40222c FADD	D16, D17, D16

  (8) 0x402230 STR	D16, [X0, X1,LSL #3]

  (8) 0x402234 ADD	X1, X1, #1

  (8) 0x402238 CMP	X22, X1

  (8) 0x40223c B.CS	402224

(10) 0x402240 CNTW	X3, ALL

(10) 0x402244 ADD	X0, X3, #3

(10) 0x402248 CMP	X20, X0

(10) 0x40224c B.CC	4023e4

(10) 0x402250 ADDPL	X6, X20, #62

(10) 0x402254 MOVN	X0, #0

(10) 0x402258 PTRUE	P7.B, ALL

(10) 0x40225c ADD	X6, X6, #1

(10) 0x402260 ADD	X4, X27, #4

(10) 0x402264 ADD	X1, X2, #4

  (12) 0x402268 LD1W	{Z7.S}, P7/Z, [X1, X0,LSL #2]

  (12) 0x40226c LD1W	{Z6.S}, P7/Z, [X4, X0,LSL #2]

  (12) 0x402270 ORR	X5, XZR, X0

  (12) 0x402274 ADD	Z6.S, Z7.S, Z6.S

  (12) 0x402278 ST1W	{Z6.S}, P7, [X1, X0,LSL #2]

  (12) 0x40227c ADD	X0, X0, X3

  (12) 0x402280 CMP	X0, X6

  (12) 0x402284 B.CC	402268

(10) 0x402288 ADDPL	X1, X5, #2

(10) 0x40228c ADD	X1, X1, #1

(10) 0x402290 ADD	X5, X27, X1,LSL #2

(10) 0x402294 ADD	X3, X2, X1,LSL #2

(10) 0x402298 CMP	X20, X0

(10) 0x40229c B.EQ	402340

(10) 0x4022a0 CNTD	X6, ALL

(10) 0x4022a4 SUB	X0, X20, X1

(10) 0x4022a8 ADD	X4, X6, #1

(10) 0x4022ac SUB	X28, X28, X1

(10) 0x4022b0 CMP	X0, X4

(10) 0x4022b4 B.CC	40231c

(10) 0x4022b8 UBFM	X4, X1, #62, #61

(10) 0x4022bc SUB	X8, X28, X6

(10) 0x4022c0 PTRUE	P7.B, ALL

(10) 0x4022c4 ADD	X4, X4, #4

(10) 0x4022c8 MOVN	X0, #0

(10) 0x4022cc ADD	X2, X2, X4

(10) 0x4022d0 ADD	X4, X27, X4

(10) 0x4022d4 HINT	#0

(10) 0x4022d8 HINT	#0

(10) 0x4022dc HINT	#0

  (11) 0x4022e0 LD1W	{Z5.D}, P7/Z, [X2, X0,LSL #2]

  (11) 0x4022e4 LD1W	{Z4.D}, P7/Z, [X4, X0,LSL #2]

  (11) 0x4022e8 ORR	X7, XZR, X0

  (11) 0x4022ec ADD	Z4.S, Z5.S, Z4.S

  (11) 0x4022f0 ST1W	{Z4.D}, P7, [X2, X0,LSL #2]

  (11) 0x4022f4 ADD	X0, X0, X6

  (11) 0x4022f8 CMP	X8, X0

  (11) 0x4022fc B.HI	4022e0

(10) 0x402300 ADDPL	X0, X7, #1

(10) 0x402304 ADD	X0, X0, #1

(10) 0x402308 ADD	X5, X5, X0,LSL #2

(10) 0x40230c ADD	X1, X1, X0

(10) 0x402310 ADD	X3, X3, X0,LSL #2

(10) 0x402314 CMP	X28, X0

(10) 0x402318 B.EQ	402340

(10) 0x40231c SUB	X2, X3, X1,LSL #2

(10) 0x402320 SUB	X4, X5, X1,LSL #2

  (9) 0x402324 LDR	W0, [X2, X1,LSL #2]

  (9) 0x402328 LDR	W3, [X4, X1,LSL #2]

  (9) 0x40232c ADD	W0, W0, W3

  (9) 0x402330 STR	W0, [X2, X1,LSL #2]

  (9) 0x402334 ADD	X1, X1, #1

  (9) 0x402338 CMP	X20, X1

  (9) 0x40233c B.CS	402324

(10) 0x402340 BL	4017c0

(10) 0x402344 ADD	SP, X29, #0

(10) 0x402348 LDP	X19, X20, [SP, #16]

(10) 0x40234c LDP	X21, X22, [SP, #32]

(10) 0x402350 LDP	X23, X24, [SP, #48]

(10) 0x402354 LDP	X25, X26, [SP, #64]

(10) 0x402358 LDP	X27, X28, [SP, #80]

(10) 0x40235c LDP	X29, X30, [SP], #112

(10) 0x402360 RET

(10) 0x402364 ADD	W5, W5, #1

(10) 0x402368 MOVZ	W0, #0

(10) 0x40236c B	4020b8

0x402370 MOVZ	X0, #0

0x402374 HINT	#0

0x402378 HINT	#0

0x40237c HINT	#0

(6) 0x402380 STR	WZR, [X27, X0,LSL #2]

(6) 0x402384 ADD	X0, X0, #1

(6) 0x402388 CMP	X20, X0

(6) 0x40238c B.CS	402380

0x402390 B	402090

0x402394 MOVZ	X0, #0

0x402398 HINT	#0

0x40239c HINT	#0

(4) 0x4023a0 STR	XZR, [X23, X0,LSL #3]

(4) 0x4023a4 ADD	X0, X0, #1

(4) 0x4023a8 CMP	X24, X0

(4) 0x4023ac B.CS	4023a0

0x4023b0 B	401ef0

0x4023b4 MOVZ	X0, #0

0x4023b8 HINT	#0

0x4023bc HINT	#0

(5) 0x4023c0 STR	XZR, [X21, X0,LSL #3]

(5) 0x4023c4 ADD	X0, X0, #1

(5) 0x4023c8 CMP	X22, X0

(5) 0x4023cc B.CS	4023c0

0x4023d0 B	401f90

(10) 0x4023d4 MOVZ	X1, #0

(10) 0x4023d8 B	402198

(10) 0x4023dc MOVZ	X1, #0

(10) 0x4023e0 B	40221c

(10) 0x4023e4 MOVZ	X1, #0

(10) 0x4023e8 ORR	X3, XZR, X2

(10) 0x4023ec ORR	X5, XZR, X27

(10) 0x4023f0 B	4022a0

0x4023f4 MOVZ	X2, #0

0x4023f8 ADD	X4, SP, #0

0x4023fc B	402018

Coverage (%)	Name	Source Location	Module
►100.00+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:146	kmeans-gcc-O3
○	main	main.cpp:27	kmeans-gcc-O3
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-O3

Coverage (%)	Name	Source Location	Module
►65.22+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►34.78+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:146	kmeans-gcc-O3
○	main	main.cpp:27	kmeans-gcc-O3
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-O3

Coverage (%)	Name	Source Location	Module
►84.29+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►15.71+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:146	kmeans-gcc-O3
○	main	main.cpp:27	kmeans-gcc-O3
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-O3

Coverage (%)	Name	Source Location	Module
►92.31+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►7.69+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:146	kmeans-gcc-O3
○	main	main.cpp:27	kmeans-gcc-O3
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-O3

Coverage (%)	Name	Source Location	Module
►96.60+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►3.40+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:146	kmeans-gcc-O3
○	main	main.cpp:27	kmeans-gcc-O3
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-O3

Coverage (%)	Name	Source Location	Module
►98.33+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►1.67+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:146	kmeans-gcc-O3
○	main	main.cpp:27	kmeans-gcc-O3
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-O3

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Average path: Display a virtual path defined by average values of all real paths

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_1_thread

Source file and lines	main.cpp:138-143
Module	kmeans-gcc-O3

The function is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:138-143.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.25 to 4.00 cycles (6.31x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your function is not vectorized. Only 28% of vector register length is used (average across all VPU instructions). By vectorizing your function, you can lower the cost of an iteration from 25.25 to 11.09 cycles (2.28x speedup).

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 25.25 to 1.00 cycles (25.25x speedup).

CALL instructions

Detected function call instructions.

Details

Calling (and then returning from) a function prevents many compiler optimizations (like vectorization), breaks control flow (which reduces pipeline performance) and executes extra instructions to save/restore the registers used inside it, which is very expensive (dozens of cycles). Consider to inline small functions.

unknown: 2 occurrences►
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:138
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:138

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 48 bytes. The binary function is storing 108 bytes.

General properties

nb instructions	146
nb uops	131
loop length	584
used w registers	6
used x registers	22
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	4
nb stack references	6

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.38 cycles
front end	16.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	8.00	8.00	25.25	25.25	25.25	25.25	2.00	2.00	0.00	0.00	4.33	4.33	4.33	4.00	4.00
cycles	8.00	8.00	25.25	25.25	25.25	25.25	2.00	2.00	0.00	0.00	4.33	4.33	4.33	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

5.00-12.50

Cycles summary

Front-end	16.38
Dispatch	25.25
DIV/SQRT	5.00-12.50
Overall L1	25.25

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	0%
other	0%

Vector efficiency ratios

all	28%
load	30%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	12%
div/sqrt	12%
other	28%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.25 cycles. At this rate:

1% of peak load performance is reached (1.90 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (4.28 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 401e24

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CNTW X2, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X1, X26, [X25]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X20, [X25, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X1, [X29, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDP X24, X22, [X25, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
UBFM X1, X24, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X24, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X1, #23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X24, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
AND X1, X1, #7932	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CCMN X3, #15, #2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR W3, [X25, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
SUB SP, SP, X1,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
ADD X23, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
B.HI 402394 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x570>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADDVL X5, SP, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X24, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DUP Z31.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADD X5, X5, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADDPL X2, X6, #2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X0, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X24, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 401ef0 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0xcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X1, X0, X1,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X23, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
UBFM X1, X22, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CNTW X2, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X1, X1, #23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
AND X1, X1, #7932	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
SUB X4, X22, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB SP, SP, X1,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
CCMN X4, #15, #2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X21, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
B.HI 4023b4 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADDVL X5, SP, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DUP Z30.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADD X5, X5, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
ADDPL X2, X6, #2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X0, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X22, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 401f90 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X1, X0, X1,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X21, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
ADD X28, X20, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CNTD X1, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
UBFM X0, X28, #62, #61	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X20, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
AND X0, X0, #7932	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X20, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB SP, SP, X0,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
CCMN X1, #18, #2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X27, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
B.HI 402370 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x54c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CNTH X2, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X20, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CC 4023f4 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x5d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADDVL X6, SP, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X20, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DUP Z29.B, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADD X6, X6, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADDPL X2, X5, #4	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, X27, X2,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 402090 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x26c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CNTD X5, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X20, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X5, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X8, X28, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X0, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CC 402074 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X7, X8, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
ADD X0, X27, X0,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
DUP Z28.B, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADDPL X0, X6, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, X4, X0,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X8, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 402090 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x26c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X0, X4, X2,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
STR W3, [X29, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 401930 <@plt_start@+0x2b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 401880 <@plt_start@+0x200>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W3, [X29, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ORR W1, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SDIV W5, W3, W19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	scal (12.5%)
MSUB W0, W5, W19, W3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
CMP W1, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.LT 402364 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x540>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
B 402090 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x26c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
B 401ef0 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0xcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
B 401f90 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 402018 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x1f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

The code analyzed by CQA in that panel excludes loops and represents 0.00% of application time for run run_1_thread

Source file and lines	main.cpp:138-143
Module	kmeans-gcc-O3

The function is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:138-143.

Warnings:
Ignoring paths for analysis

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 25.25 to 4.00 cycles (6.31x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Details

All VPU instructions are used in scalar version (process only one data element in vector registers). Since your execution units are vector units, only a vectorized function can use their full power.

Workaround

Try another compiler or update/tune your current one
Make array accesses unit-stride:
- If your function streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

Expensive FP math instructions/calls

Detected performance impact from expensive FP math instructions/calls. By removing/reexpressing them, you can lower the cost of an iteration from 25.25 to 1.00 cycles (25.25x speedup).

CALL instructions

Detected function call instructions.

Details

unknown: 2 occurrences►
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:138
- /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:138

Matching between your function (in the source code) and the binary function

The binary function does not contain any FP arithmetical operations. The binary function is loading 48 bytes. The binary function is storing 108 bytes.

General properties

nb instructions	146
nb uops	131
loop length	584
used w registers	6
used x registers	22
used b registers	0
used h registers	0
used s registers	1
used d registers	0
used q registers	0
used v registers	0
used z registers	4
nb stack references	6

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	16.38 cycles
front end	16.38 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	8.00	8.00	25.25	25.25	25.25	25.25	2.00	2.00	0.00	0.00	4.33	4.33	4.33	4.00	4.00
cycles	8.00	8.00	25.25	25.25	25.25	25.25	2.00	2.00	0.00	0.00	4.33	4.33	4.33	4.00	4.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions

5.00-12.50

Cycles summary

Front-end	16.38
Dispatch	25.25
DIV/SQRT	5.00-12.50
Overall L1	25.25

Vectorization ratios

all	0%
load	0%
store	0%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	0%
fma	0%
div/sqrt	0%
other	0%

Vector efficiency ratios

all	28%
load	30%
store	42%
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	25%
fma	12%
div/sqrt	12%
other	28%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each call to the function takes 25.25 cycles. At this rate:

1% of peak load performance is reached (1.90 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))
8% of peak store performance is reached (4.28 out of 48.00 bytes stored per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the function is: 401e24

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
STP X29, X30, [SP, #912]!	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ADD X29, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CNTW X2, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
STP X25, X26, [SP, #64]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
ORR X25, XZR, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
STP X19, X20, [SP, #16]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X21, X22, [SP, #32]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X23, X24, [SP, #48]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
STP X27, X28, [SP, #80]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (50.0%)
LDP X1, X26, [X25]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
LDR X20, [X25, #80]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (25.0%)
STR X1, [X29, #96]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (25.0%)
LDP X24, X22, [X25, #64]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	1	scal (50.0%)
UBFM X1, X24, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X3, X24, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X1, #23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X24, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
AND X1, X1, #7932	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CCMN X3, #15, #2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
LDR W3, [X25, #88]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
SUB SP, SP, X1,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
ADD X23, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
B.HI 402394 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x570>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADDVL X5, SP, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X24, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DUP Z31.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADD X5, X5, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADDPL X2, X6, #2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X0, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X24, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 401ef0 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0xcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X1, X0, X1,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X23, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
UBFM X1, X22, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CNTW X2, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X1, X1, #23	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
AND X1, X1, #7932	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
SUB X4, X22, #13	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
SUB SP, SP, X1,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
CCMN X4, #15, #2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X21, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
B.HI 4023b4 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x590>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADDVL X5, SP, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X22, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DUP Z30.D, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADD X5, X5, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
ADDPL X2, X6, #2	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
UBFM X0, X2, #61, #60	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X22, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 401f90 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X1, X0, X1,LSL #3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X1, #8	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X21, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
ADD X28, X20, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CNTD X1, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
UBFM X0, X28, #62, #61	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X1, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X0, X0, #15	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X20, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
AND X0, X0, #7932	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X1, X20, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB SP, SP, X0,UXTX	1	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	0	0	2	0.50	N/A
CCMN X1, #18, #2, #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X27, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
B.HI 402370 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x54c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CNTH X2, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X20, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CC 4023f4 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x5d0>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADDVL X6, SP, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X20, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
DUP Z29.B, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADD X6, X6, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADDPL X2, X5, #4	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X2, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, X27, X2,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP X20, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 402090 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x26c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
CNTD X5, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
SUB X0, X20, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X1, X5, #4	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X8, X28, X2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X0, X1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.CC 402074 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x250>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ADD X0, X2, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
SUB X7, X8, X5	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
PTRUE P7.B, ALL	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (100.0%)
ADD X0, X27, X0,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVN X1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
DUP Z28.B, #0	1	0	0	0	0	0	0	0.50	0.50	0	0	0	0	0	0	0	2	0.50	scal (3.1%)
ADDPL X0, X6, #1	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (25.0%)
ADD X0, X0, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, X4, X0,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X2, X2, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
CMP X8, X0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (25.0%)
B.EQ 402090 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x26c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
SUB X0, X4, X2,LSL #2	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
STR W3, [X29, #104]	1	0	0	0	0	0	0	0	0	0	0	0.50	0.50	0	0.50	0.50	1	0.50	scal (12.5%)
BL 401930 <@plt_start@+0x2b0>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
ORR W19, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
BL 401880 <@plt_start@+0x200>	1	0.50	0.50	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
LDR W3, [X29, #104]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	4	0.33	scal (12.5%)
ORR W1, WZR, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
SDIV W5, W3, W19	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	5-12	5-12.50	scal (12.5%)
MSUB W0, W5, W19, W3	1	0	0	0	0	1	0	0	0	0	0	0	0	0	0	0	2	1	scal (12.5%)
CMP W1, W0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	scal (12.5%)
B.LT 402364 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x540>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
HINT #0																			N/A
B 402090 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x26c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
B 401ef0 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0xcc>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X0, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
HINT #0																			N/A
HINT #0																			N/A
B 401f90 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x16c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A
MOVZ X2, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
ADD X4, SP, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
B 402018 <_Z7k_meansiP7point_tS0_Piii._omp_fn.1+0x1f4>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

▶Scalability Runs Description

Run run_1_thread	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_NUM_THREADS: 1OMP_PLACES: cores
Run run_2_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 2
Run run_4_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 4
Run run_8_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 8
Run run_16_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 16
Run run_32_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_PLACES: coresOMP_NUM_THREADS: 32
Run run_64_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_PLACES: coresOMP_NUM_THREADS: 64

(run_1_thread) Efficiency	(run_1_thread) Potential Speed-Up (%)	(run_2_threads) Efficiency	(run_2_threads) Potential Speed-Up (%)	(run_4_threads) Efficiency	(run_4_threads) Potential Speed-Up (%)	(run_8_threads) Efficiency	(run_8_threads) Potential Speed-Up (%)	(run_16_threads) Efficiency	(run_16_threads) Potential Speed-Up (%)	(run_32_threads) Efficiency	(run_32_threads) Potential Speed-Up (%)	(run_64_threads) Efficiency	(run_64_threads) Potential Speed-Up (%)
1	0	1	0	0.21	0.06	0.07	0.22	0.03	0.52	0.01	2.74	0	18.04

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
run_1_thread	1	1	1	1	0.024999996647239	0.017089927569032
run_2_threads	2	1	1	2	0	0
run_4_threads	4	0.21	0.84	4	0.03999999538064	0.078257910907269
run_8_threads	8	0.07	0.55	8	0.054999992251396	0.23803049325943
run_16_threads	16	0.03	0.48	16	0.10499999672174	0.5336799621582
run_32_threads	32	0.01	0.18	32	0.21999995410442	2.7513687610626
run_64_threads	64	0	0.06	64	0.19500002264977	18.05814743042

Name	Coverage (%)	Time (s)
▼k_means(int, point_t, point_t, int*, int, int) [clone ._omp_fn.1]–	0.02	0.02
○Loop 6 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 5 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 18 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 22 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
▼Loop 10 - main.cpp:138-143 - kmeans-gcc-O3–	0.00	0.00
○Loop 15 - main.cpp:140-143 - kmeans-gcc-O3	0.02	0.02
○Loop 8 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 11 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 14 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 9 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 12 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 7 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 13 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 16 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 21 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 19 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 20 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 4 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00
○Loop 17 - main.cpp:138-138 - kmeans-gcc-O3	0.00	0.00

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Expensive FP math instructions/calls

CALL instructions

Details

Matching between your function (in the source code) and the binary function

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency