OV - K-Means scalability gcc-Ofast 100000000 - Loop 3

0x401dec LDP	D28, D27, [X4]

0x401df0 FMOV	D29, D26

0x401df4 ORR	X0, XZR, X7

0x401df8 MOVZ	W1, #0

0x401dfc HINT	#0

  (2) 0x401e00 LDP	D31, D30, [X0], #16

  (2) 0x401e04 FSUB	D30, D27, S30

  (2) 0x401e08 FSUB	D31, D28, S31

  (2) 0x401e0c FMUL	D30, D30, D30

  (2) 0x401e10 FMADD	D31, D31, D31, D30

  (2) 0x401e14 FCMPE	D29, D31

  (2) 0x401e18 B.LS	401e24

  (2) 0x401e1c FMOV	D29, D31

  (2) 0x401e20 STR	W1, [X5, X3,LSL #2]

  (2) 0x401e24 ADD	W1, W1, #1

  (2) 0x401e28 CMP	W2, W1

  (2) 0x401e2c B.NE	401e00

0x401e30 ADD	X3, X3, #1

0x401e34 ADD	X4, X4, #16

0x401e38 CMP	W6, W3

0x401e3c B.GT	401dec

/home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp: 115 - 122

--------------------------------------------------------------------------------

115:             double optimal_dist = DBL_MAX;

116:             for (int j = 0; j < k; ++j) {

117:                 double dist =

118:                     (points[i].x - centroids[j].x) * (points[i].x - centroids[j].x) +

119:                     (points[i].y - centroids[j].y) * (points[i].y - centroids[j].y);

120:                 if (dist < optimal_dist) {

121:                     optimal_dist = dist;

122:                     assignment[i] = j;

Coverage (%)	Name	Source Location	Module
►100.00+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:23	kmeans-gcc-Ofast
○	main	main.cpp:188	kmeans-gcc-Ofast
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-Ofast

Coverage (%)	Name	Source Location	Module
►55.20+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:23	kmeans-gcc-Ofast
○	main	main.cpp:188	kmeans-gcc-Ofast
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-Ofast
►44.80+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6

Coverage (%)	Name	Source Location	Module
►73.61+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►26.39+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:23	kmeans-gcc-Ofast
○	main	main.cpp:188	kmeans-gcc-Ofast
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-Ofast

Coverage (%)	Name	Source Location	Module
►83.20+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►16.80+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:23	kmeans-gcc-Ofast
○	main	main.cpp:188	kmeans-gcc-Ofast
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-Ofast

Coverage (%)	Name	Source Location	Module
►90.96+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►9.04+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:23	kmeans-gcc-Ofast
○	main	main.cpp:188	kmeans-gcc-Ofast
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-Ofast

Coverage (%)	Name	Source Location	Module
►95.71+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►4.29+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:23	kmeans-gcc-Ofast
○	main	main.cpp:188	kmeans-gcc-Ofast
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-Ofast

Coverage (%)	Name	Source Location	Module
►97.51+	gomp_thread_start	team.c:130	libgomp.so.1.0.0
○	pthread_condattr_setpshared		libc.so.6
○	__clone		libc.so.6
►2.49+	GOMP_parallel	libgomp.h:980	libgomp.so.1.0.0
○	k_means(int, point_t*, point_t[...]	main.cpp:23	kmeans-gcc-Ofast
○	main	main.cpp:188	kmeans-gcc-Ofast
○	__libc_init_first		libc.so.6
○	__libc_start_main		libc.so.6
○	_start	new_allocator.h:104	kmeans-gcc-Ofast

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

min	med	avg	max

Percentile Index	10	20	30	40	50	60	70	80	90	100
Value

Path /

Metric	Value
CQA speedup if no scalar integer	1.25
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.67
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.25
Bottlenecks	P2, P3, P4, P5,
Function	k_means(int, point_t, point_t, int*, int, int) [clone ._omp_fn.0]
Source	main.cpp:115-116,main.cpp:119-119
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	1.25
CQA cycles if no scalar integer	1.00
CQA cycles if FP arith vectorized	1.25
CQA cycles if fully vectorized	0.19
Front-end cycles	1.00
P0 cycles	0.50
P1 cycles	0.50
P2 cycles	1.25
P3 cycles	1.25
P4 cycles	1.25
P5 cycles	1.25
P6 cycles	0.25
P7 cycles	0.25
P8 cycles	0.25
P9 cycles	0.25
P10 cycles	0.33
P11 cycles	0.33
P12 cycles	0.33
P13 cycles	0.00
P14 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	9.00
Nb uops	8.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	12.80
Bytes prefetched	0.00
Bytes loaded	16.00
Bytes stored	0.00
Stride 0	0.00
Stride 1	0.00
Stride n	0.00
Stride unknown	1.00
Stride indirect	0.00
Vectorization ratio all	25.00
Vectorization ratio load	100.00
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	28.13
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	20.83

Metric	Value
CQA speedup if no scalar integer	1.25
CQA speedup if FP arith vectorized	1.00
CQA speedup if fully vectorized	6.67
CQA speedup if no inter-iteration dependency	NA
CQA speedup if next bottleneck killed	1.25
Bottlenecks	P2, P3, P4, P5,
Function	k_means(int, point_t, point_t, int*, int, int) [clone ._omp_fn.0]
Source	main.cpp:115-116,main.cpp:119-119
Source loop unroll info	NA
Source loop unroll confidence level	NA
Unroll/vectorization loop type	NA
Unroll factor	NA
CQA cycles	1.25
CQA cycles if no scalar integer	1.00
CQA cycles if FP arith vectorized	1.25
CQA cycles if fully vectorized	0.19
Front-end cycles	1.00
P0 cycles	0.50
P1 cycles	0.50
P2 cycles	1.25
P3 cycles	1.25
P4 cycles	1.25
P5 cycles	1.25
P6 cycles	0.25
P7 cycles	0.25
P8 cycles	0.25
P9 cycles	0.25
P10 cycles	0.33
P11 cycles	0.33
P12 cycles	0.33
P13 cycles	0.00
P14 cycles	0.00
DIV/SQRT cycles	0.00
Inter-iter dependencies cycles	1
FE+BE cycles (UFS)	NA
Stall cycles (UFS)	NA
Nb insns	9.00
Nb uops	8.00
Nb loads	NA
Nb stores	0.00
Nb stack references	0.00
FLOP/cycle	0.00
Nb FLOP add-sub	0.00
Nb FLOP mul	0.00
Nb FLOP fma	0.00
Nb FLOP div	0.00
Nb FLOP rcp	0.00
Nb FLOP sqrt	0.00
Nb FLOP rsqrt	0.00
Bytes/cycle	12.80
Bytes prefetched	0.00
Bytes loaded	16.00
Bytes stored	0.00
Stride 0	0.00
Stride 1	0.00
Stride n	0.00
Stride unknown	1.00
Stride indirect	0.00
Vectorization ratio all	25.00
Vectorization ratio load	100.00
Vectorization ratio store	NA
Vectorization ratio mul	NA
Vectorization ratio add_sub	NA
Vectorization ratio fma	NA
Vectorization ratio div_sqrt	NA
Vectorization ratio other	0.00
Vector-efficiency ratio all	28.13
Vector-efficiency ratio load	50.00
Vector-efficiency ratio store	NA
Vector-efficiency ratio mul	NA
Vector-efficiency ratio add_sub	NA
Vector-efficiency ratio fma	NA
Vector-efficiency ratio div_sqrt	NA
Vector-efficiency ratio other	20.83

Path /

Average path: Display a virtual path defined by average values of all real paths

Function	k_means(int, point_t, point_t, int*, int, int) [clone ._omp_fn.0]
Source file and lines	main.cpp:115-122
Module	kmeans-gcc-Ofast

The loop is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:115-122.

Analyzed code is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:115-116,119.

Warnings:
Non-innermost loop: analyzing only self part (ignoring child loops).
The structure of this loop is probably <if then [else] end>.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 1.25 to 1.00 cycles (1.25x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 28% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 1.25 to 0.19 cycles (6.67x speedup).

Details

25% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Constant unknown stride: 1 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 16 bytes.

General properties

nb instructions	9
nb uops	8
loop length	36
used w registers	3
used x registers	5
used b registers	0
used h registers	0
used s registers	0
used d registers	4
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	1.00 cycles
front end	1.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	1.25	1.25	1.25	1.25	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0.00	0.00
cycles	0.50	0.50	1.25	1.25	1.25	1.25	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	1.00
Dispatch	1.25
Data deps.	1.00
Overall L1	1.25

Vectorization ratios

INT

all	33%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

FP

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	25%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	29%
load	50%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	18%

FP

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	28%
load	50%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 1.25 cycles. At this rate:

13% of peak load performance is reached (12.80 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 401dec

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDP D28, D27, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
FMOV D29, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
ORR X0, XZR, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X4, X4, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP W6, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.GT 401dec <_Z7k_meansiP7point_tS0_Piii._omp_fn.0+0x6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

Function	k_means(int, point_t, point_t, int*, int, int) [clone ._omp_fn.0]
Source file and lines	main.cpp:115-122
Module	kmeans-gcc-Ofast

The loop is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:115-122.

Analyzed code is defined in /home/fmusial/KMEANS_Benchmarks/kmeans/main.cpp:115-116,119.

Warnings:
Non-innermost loop: analyzing only self part (ignoring child loops).
The structure of this loop is probably <if then [else] end>.

The presence of multiple execution paths is typically the main/first bottleneck.
Try to simplify control inside loop: ideally, try to remove all conditional expressions, for example by (if applicable):

hoisting them (moving them outside the loop)
turning them into conditional moves, MIN or MAX

Ex: if (x<0) x=0 => x = (x<0 ? 0 : x) (or MAX(0,x) after defining the corresponding macro)

gain
potential
hint
expert

Code clean check

Detected a slowdown caused by scalar integer instructions (typically used for address computation). By removing them, you can lower the cost of an iteration from 1.25 to 1.00 cycles (1.25x speedup).

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Vectorization

Your loop is poorly vectorized. Only 28% of vector register length is used (average across all VPU instructions). By fully vectorizing your loop, you can lower the cost of an iteration from 1.25 to 0.19 cycles (6.67x speedup).

Details

25% of VPU instructions are used in vector version (process two or more data elements in vector registers):

0% of VPU instructions that are not load, store, addition, subtraction nor multiply instructions are used in vector version.

Since your execution units are vector units, only a fully vectorized loop can use their full power.

Workaround

Try another compiler or update/tune your current one
Remove inter-iterations dependences from your loop and make it unit-stride:
- If your arrays have 2 or more dimensions, check whether elements are accessed contiguously and, otherwise, try to permute loops accordingly: C storage order is row-major: for(i) for(j) a[j][i] = b[j][i]; (slow, non stride 1) => for(i) for(j) a[i][j] = b[i][j]; (fast, stride 1)
- If your loop streams arrays of structures (AoS), try to use structures of arrays instead (SoA): for(i) a[i].x = b[i].x; (slow, non stride 1) => for(i) a.x[i] = b.x[i]; (fast, stride 1)

No data for this section

Slow data structures access

Detected data structures (typically arrays) that cannot be efficiently read/written

Details

Constant unknown stride: 1 occurrence(s)

Non-unit stride (uncontiguous) accesses are not efficiently using data caches

Workaround

Try to reorganize arrays of structures to structures of arrays
Consider to permute loops (see vectorization gain report)

Matching between your loop (in the source code) and the binary loop

The binary loop does not contain any FP arithmetical operations. The binary loop is loading 16 bytes.

General properties

nb instructions	9
nb uops	8
loop length	36
used w registers	3
used x registers	5
used b registers	0
used h registers	0
used s registers	0
used d registers	4
used q registers	0
used v registers	0
used z registers	0
nb stack references	0

Front-end

MACRO FUSION NOT POSSIBLE FIT IN UOP CACHE

micro-operation queue	1.00 cycles
front end	1.00 cycles

Back-end

	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14
uops	0.50	0.50	1.25	1.25	1.25	1.25	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0.00	0.00
cycles	0.50	0.50	1.25	1.25	1.25	1.25	0.25	0.25	0.25	0.25	0.33	0.33	0.33	0.00	0.00

Execution ports to units layout:

P0: BRU
P1: BRU
P2: ALU
P3: ALU
P4: ALU
P5: ALU
P6 (128 bits): VPU, FP store data, ALU, DIV/SQRT
P7 (128 bits): VPU, ALU, FP store data
P8 (128 bits): VPU, ALU, DIV/SQRT
P9 (128 bits): ALU, VPU
P10 (256 bits): store address, load
P11 (256 bits): store address, load
P12 (256 bits): load
P13 (64 bits): store data
P14 (64 bits): store data

Cycles executing div or sqrt instructions	NA
Longest recurrence chain latency (RecMII)	1.00

Cycles summary

Front-end	1.00
Dispatch	1.25
Data deps.	1.00
Overall L1	1.25

Vectorization ratios

INT

all	33%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	0%

FP

all	0%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

INT+FP

all	25%
load	100%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	0%

Vector efficiency ratios

INT

all	29%
load	50%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
other	18%

FP

all	25%
load	NA (no load vectorizable/vectorized instructions)
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	25%

INT+FP

all	28%
load	50%
store	NA (no store vectorizable/vectorized instructions)
mul	NA (no mul vectorizable/vectorized instructions)
add-sub	NA (no add-sub vectorizable/vectorized instructions)
fma	NA (no fma vectorizable/vectorized instructions)
div/sqrt	NA (no div/sqrt vectorizable/vectorized instructions)
other	20%

Cycles and memory resources usage

Assuming all data fit into the L1 cache, each iteration of the binary loop takes 1.25 cycles. At this rate:

13% of peak load performance is reached (12.80 out of 96.00 bytes loaded per cycle (GB/s @ 1GHz))

Front-end bottlenecks

Found no such bottlenecks.

ASM code

In the binary file, the address of the loop is: 401dec

Instruction	Nb FU	P0	P1	P2	P3	P4	P5	P6	P7	P8	P9	P10	P11	P12	P13	P14	Latency	Recip. throughput	Vectorization
LDP D28, D27, [X4]	1	0	0	0	0	0	0	0	0	0	0	0.33	0.33	0.33	0	0	6	0.33	vect (50.0%)
FMOV D29, D26	1	0	0	0	0	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	2	0.25	scal (25.0%)
ORR X0, XZR, X7	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (25.0%)
MOVZ W1, #0	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	scal (12.5%)
HINT #0																			N/A
ADD X3, X3, #1	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
ADD X4, X4, #16	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.25	N/A
CMP W6, W3	1	0	0	0.25	0.25	0.25	0.25	0	0	0	0	0	0	0	0	0	1	0.33	N/A
B.GT 401dec <_Z7k_meansiP7point_tS0_Piii._omp_fn.0+0x6c>	1	0.50	0.50	0	0	0	0	0	0	0	0	0	0	0	0	0	1	0.50	N/A

▶Scalability Runs Description

Run run_1_thread	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_NUM_THREADS: 1OMP_PLACES: cores
Run run_2_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 2
Run run_4_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 4
Run run_8_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 8
Run run_16_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PLACES: coresOMP_PROC_BIND: closeOMP_NUM_THREADS: 16
Run run_32_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_PLACES: coresOMP_NUM_THREADS: 32
Run run_64_threads	Number processes: 1Number nodes: 1Run Command: <executable> kmeans/input/100000000.in 1000 100000000 50 25MPI Command: Dataset: Run Directory: /home/fmusial/KMEANS_BenchmarksOMP_PROC_BIND: closeOMP_PLACES: coresOMP_NUM_THREADS: 64

(run_1_thread) Efficiency	(run_1_thread) Potential Speed-Up (%)	(run_2_threads) Efficiency	(run_2_threads) Potential Speed-Up (%)	(run_4_threads) Efficiency	(run_4_threads) Potential Speed-Up (%)	(run_8_threads) Efficiency	(run_8_threads) Potential Speed-Up (%)	(run_16_threads) Efficiency	(run_16_threads) Potential Speed-Up (%)	(run_32_threads) Efficiency	(run_32_threads) Potential Speed-Up (%)	(run_64_threads) Efficiency	(run_64_threads) Potential Speed-Up (%)
1	0	0.97	0.04	0.95	0.07	0.94	0.08	0.89	0.15	0.91	0.12	1.24	0

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency

Run	Number of threads	Efficiency (ideal is 1)	Speedup	Ideal Speedup	Time (s)	Coverage (%)
run_1_thread	1	1	1	1	2.4349999427795	1.3270119428635
run_2_threads	2	0.97	1.94	2	1.3799998760223	1.3578472137451
run_4_threads	4	0.95	3.81	4	0.69999992847443	1.3649288415909
run_8_threads	8	0.94	7.53	8	0.41999995708466	1.3581420183182
run_16_threads	16	0.89	14.32	16	0.23999999463558	1.4213086366653
run_32_threads	32	0.91	29	32	0.15499997138977	1.3027313947678
run_64_threads	64	1.24	79.05	64	0.049999989569187	1.1962147951126

Report Configuration

Code clean check

Workaround

Vectorization

Details

Workaround

Slow data structures access

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

Code clean check

Workaround

Vectorization

Details

Workaround

Slow data structures access

Details

Workaround

Matching between your loop (in the source code) and the binary loop

General properties

Front-end

Back-end

Cycles summary

Vectorization ratios

Vector efficiency ratios

Cycles and memory resources usage

Front-end bottlenecks

ASM code

▶Scalability Runs Description

▼Columns Filter

Speed-Up and Efficiency

▶Detailed Speed-Up and Efficiency